[RTEMS Project] #2811: More robust thread dispatching on SMP and ARM Cortex-M

[RTEMS trac]

#2811: More robust thread dispatching on SMP and ARM Cortex-M
-----------------------------+-----------------------------
 Reporter:  sebastian.huber  |      Owner:  sebastian.huber
     Type:  enhancement      |     Status:  new
 Priority:  normal           |  Milestone:  4.12
Component:  cpukit           |    Version:  4.11
 Severity:  normal           |   Keywords:
-----------------------------+-----------------------------
 On SMP configurations, it is a fatal error to call blocking operating
 system with interrupts disabled, since this prevents delivery of inter-
 processor interrupts.  This could lead to executing threads which are not
 allowed to execute resulting in undefined behaviour.

 The ARM Cortex-M port has a similar problem, since the interrupt state is
 not a part of the thread context.

 Add a new CPU port function:
 {{{
 #!c
 /**
  * @brief Returns true if interrupts are enabled in the specified ISR
 level,
  * otherwise returns false.
  *
  * @param[in] level The ISR level.
  *
  * @retval true Interrupts are enabled in the ISR level.
  * @retval false Otherwise.
  */
 RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled( uint32_t level )
 {
   return false;
 }
 }}}

 Use this function to ensure that _Thread_Do_dispatch() is called with an
 interrupt level with enabled interrupts, otherwise call _Terminate().

--
Ticket URL: <http://devel.rtems.org/ticket/2811>
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