[RTEMS Project] #2811: More robust thread dispatching on SMP and ARM Cortex-M

[RTEMS trac]

#2811: More robust thread dispatching on SMP and ARM Cortex-M
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 Reporter:  sebastian.huber  |       Owner:  sebastian.huber
     Type:  enhancement      |      Status:  new
 Priority:  normal           |   Milestone:  4.12
Component:  cpukit           |     Version:  4.11
 Severity:  normal           |  Resolution:
 Keywords:                   |
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Comment (by chrisj):

 Replying to [comment:2 sebastian.huber]:
 > I will add _CPU_ISR_Is_enabled() unconditionally.  The fatal error will
 be limited to SMP and ARM Cortex-M.

 I would prefer to see an error code returned. Fatal errors should be
 limited to internal issues like inconsistencies where the kernel cannot
 reasonable continue and not user errors with an API. Fatal errors can also
 be difficult to track down with threading unless you have a thread aware
 debugger. Not all users or BSPs have this support.

 > However, its an application bug in general to call blocking operations
 with interrupts disabled.

 Yes I would agree and if a user makes a call to RTEMS that is not valid we
 should return a suitable error or status code. For a single core system we
 have allowed this in past release so as a general change this is something
 that changes our current behavior.

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Ticket URL: <http://devel.rtems.org/ticket/2811#comment:3>
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