[RTEMS Project] #2751: Thread dispatch via interrupt is broken at least on ARM and PowerPC

[RTEMS trac]

#2751: Thread dispatch via interrupt is broken at least on ARM and PowerPC
-----------------------------+------------------------------
 Reporter:  sebastian.huber  |       Owner:  sebastian.huber
     Type:  defect           |      Status:  new
 Priority:  normal           |   Milestone:  4.12
Component:  SMP              |     Version:  4.11
 Severity:  critical         |  Resolution:
 Keywords:                   |
-----------------------------+------------------------------

Comment (by Sebastian Huber <sebastian.huber@…>):

 In [changeset:"4e2bc0a308104d96b60d8af1a0c5bcff99fe1564/rtems"]:
 {{{
 #!CommitTicketReference repository="rtems"
 revision="4e2bc0a308104d96b60d8af1a0c5bcff99fe1564"
 arm: Fix Thumb-1 targets

 We cannot use the MRS or MSR instructions in Thumb-1 mode.  Stay in ARM
 mode for the Thumb-1 targets during interrupt low-level processing.

 Update #2751.
 }}}

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Ticket URL: <http://devel.rtems.org/ticket/2751#comment:7>
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