[RTEMS Project] #2751: Thread dispatch via interrupt is broken at least on ARM and PowerPC

[RTEMS trac]

#2751: Thread dispatch via interrupt is broken at least on ARM and PowerPC
-----------------------------+------------------------------
 Reporter:  Sebastian Huber  |       Owner:  Sebastian Huber
     Type:  defect           |      Status:  closed
 Priority:  high             |   Milestone:  4.12
Component:  SMP              |     Version:  4.11
 Severity:  critical         |  Resolution:  fixed
 Keywords:                   |
-----------------------------+------------------------------

Comment (by Sebastian Huber <sebastian.huber@…>):

 In [changeset:"cd3d74793a4e2ec93cefdddb855d4536d44c7e64/rtems"
 cd3d747/rtems]:
 {{{
 #!CommitTicketReference repository="rtems"
 revision="cd3d74793a4e2ec93cefdddb855d4536d44c7e64"
 arm: Optimize context switch

 Set CPU_ENABLE_ROBUST_THREAD_DISPATCH to TRUE.  In this case the
 interrupts are always enabled during a context switch even after
 interrupt processing (see #2751).  Remove the CPSR from the context
 control since it contains only volatile bits.

 Close #2954.
 }}}

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Ticket URL: <http://devel.rtems.org/ticket/2751#comment:13>
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