[RTEMS Project] #3433: Add SMP support for RISC-V

RTEMS trac trac at rtems.org
Fri Jul 6 12:28:43 UTC 2018


#3433: Add SMP support for RISC-V
-----------------------------+-------------------------------
 Reporter:  Sebastian Huber  |       Owner:  Sebastian Huber
     Type:  project          |      Status:  accepted
 Priority:  normal           |   Milestone:  6.1
Component:  arch/riscv       |     Version:
 Severity:  normal           |  Resolution:
 Keywords:                   |  Blocked By:  3452, 3453, 3459
 Blocking:                   |
-----------------------------+-------------------------------

Comment (by Sebastian Huber <sebastian.huber@…>):

 In [changeset:"bca36d986b24b0720ce19b618bbe592baed6cb95/rtems"
 bca36d9/rtems]:
 {{{
 #!CommitTicketReference repository="rtems"
 revision="bca36d986b24b0720ce19b618bbe592baed6cb95"
 riscv: Add LADDR assembler define

 An address must be loaded to a register according to the code model.
 Add LADDR define for use in assembler code.

 Update #3433.
 }}}

--
Ticket URL: <http://devel.rtems.org/ticket/3433#comment:52>
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