[RTEMS Project] #3433: Add SMP support for RISC-V

[RTEMS trac]

#3433: Add SMP support for RISC-V
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 Reporter:  Sebastian Huber  |       Owner:  Sebastian Huber
     Type:  project          |      Status:  accepted
 Priority:  normal           |   Milestone:  6.1
Component:  arch/riscv       |     Version:
 Severity:  normal           |  Resolution:
 Keywords:                   |  Blocked By:  3452, 3453, 3459
 Blocking:                   |
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Comment (by Sebastian Huber <sebastian.huber@…>):

 In [changeset:"44c2d393bdd58e4eedfccdfd406afc6914cc4acb/rtems"
 44c2d393/rtems]:
 {{{
 #!CommitTicketReference repository="rtems"
 revision="44c2d393bdd58e4eedfccdfd406afc6914cc4acb"
 bsp/riscv: Fix inter-processor interrupts

 The previous version worked only on a patched Qemu.  Writes to mip are
 illegal according to the The RISC-V Instruction Set Manual, Volume II:
 Privileged Architecture, Privileged Architecture Version 1.10.

 Update #3433.
 }}}

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Ticket URL: <http://devel.rtems.org/ticket/3433#comment:74>
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