[RTEMS Project] #3433: Add SMP support for RISC-V

[RTEMS trac]

#3433: Add SMP support for RISC-V
-----------------------------+-------------------------------
 Reporter:  Sebastian Huber  |       Owner:  Sebastian Huber
     Type:  project          |      Status:  accepted
 Priority:  normal           |   Milestone:  6.1
Component:  arch/riscv       |     Version:
 Severity:  normal           |  Resolution:
 Keywords:                   |  Blocked By:  3452, 3453, 3459
 Blocking:                   |
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Comment (by Sebastian Huber <sebastian.huber@…>):

 In [changeset:"bc3bdf243806251ac251259267807c86d6d600dd/rtems"
 bc3bdf2/rtems]:
 {{{
 #!CommitTicketReference repository="rtems"
 revision="bc3bdf243806251ac251259267807c86d6d600dd"
 riscv: Optimize and fix interrupt disable/enable

 Use the atomic read and clear operation to disable interrupts.

 Do not write the complete mstatus.  Instead, set only the MIE bit
 depending on the level parameter.

 Update #3433.
 }}}

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Ticket URL: <http://devel.rtems.org/ticket/3433#comment:24>
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