[RTEMS Project] #3785: Add RISC-V BSP with support for the Freedom E310 Arty A7 FPGA
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Thu Dec 12 17:19:47 UTC 2019
#3785: Add RISC-V BSP with support for the Freedom E310 Arty A7 FPGA
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Reporter: pragnesh | Owner: (none)
Type: task | Status: closed
Priority: normal | Milestone: 5.1
Component: arch/riscv | Version: 5
Severity: normal | Resolution: fixed
Keywords: #RISCV, #FREEDOME310, #ARTYA7 | Blocked By:
Blocking: |
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Changes (by Joel Sherrill):
* status: new => closed
* resolution: => fixed
Comment:
Closing. The BSP and user manual contents are merged. Thank you for
submitting the BSP
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Ticket URL: <http://devel.rtems.org/ticket/3785#comment:9>
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