[RTEMS Project] #3767: Should all PPC BSPs build with -mstrict-align?

[RTEMS trac]

#3767: Should all PPC BSPs build with -mstrict-align?
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 Reporter:  Michael Davidsaver  |       Owner:  (none)
     Type:  defect              |      Status:  new
 Priority:  normal              |   Milestone:  6.1
Component:  arch/powerpc        |     Version:  6
 Severity:  normal              |  Resolution:
 Keywords:                      |  Blocked By:
 Blocking:                      |
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Comment (by Michael Davidsaver):

 I think a test case would be an excellent idea.

 From looking into this a bit more, the '-mstrict-align' flag is overly
 conservative, and doesn't capture the granularity of the instructions
 which have alignment restrictions on a particular target.

 eg. from the mpc7450 docs on the possible causes of an alignment exception

 > • A floating-point load/store, stmw, stwcx., lmw, lwarx, eciwx, or ecowx
 >   instruction operand is not word-aligned.
 > • A multiple/string load/store operation is attempted in little-endian
 mode
 > • An operand of a dcbz instruction is on a page that is write-through or
 >   cache-inhibited for a virtual mode access.
 > • An attempt to execute a dcbz instruction occurs when the cache is
 disabled
 >   or locked.

 which I read as meaning plain 'stw' would work.

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Ticket URL: <http://devel.rtems.org/ticket/3767#comment:9>
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