[RTEMS Project] #3433: Add SMP support for RISC-V

[RTEMS trac]

#3433: Add SMP support for RISC-V
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 Reporter:  Sebastian Huber  |       Owner:  Sebastian Huber
     Type:  project          |      Status:  closed
 Priority:  normal           |   Milestone:  5.1
Component:  arch/riscv       |     Version:  5
 Severity:  normal           |  Resolution:  fixed
 Keywords:                   |  Blocked By:  3452, 3453, 3459
 Blocking:                   |
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Comment (by Sebastian Huber <sebastian.huber@…>):

 In [changeset:"b9ffc41c9678fb3c5386c1a6ab394656ec85dbc6/rtems"
 b9ffc41c/rtems]:
 {{{
 #!CommitTicketReference repository="rtems"
 revision="b9ffc41c9678fb3c5386c1a6ab394656ec85dbc6"
 riscv: Enable robust thread dispatch

 It must be enabled, since the context switch code does not save/restore
 the interrupt status.

 Update #3433.
 }}}

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Ticket URL: <http://devel.rtems.org/ticket/3433#comment:92>
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