[RTEMS Project] #3760: BBB MMU update crashes

[RTEMS trac]

#3760: BBB MMU update crashes
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  Reporter:  Chris Johns  |      Owner:  (none)
      Type:  defect       |     Status:  new
  Priority:  normal       |  Milestone:  5.1
 Component:  arch/arm     |    Version:  5
  Severity:  normal       |   Keywords:
Blocked By:               |   Blocking:
--------------------------+--------------------
 Calling `arm_cp15_set_translation_table_entries()` on a BBB (Cortex-A8)
 crashes in the call to `arm_cp15_tlb_invalidate_entry_all_asids()`. There
 is no HYP support in the BBB's A8. The `cp15` register is documented in
 the A8 manual but the BBB device from TI does not have the support built
 in.

 A check of the A8 doco from ARM says this is for use in HYP mode so should
 we be using without checking if HYP is supported and if it is active? I am
 also wondering if we use should be using it on the Zynq. I have no idea
 why the Zync (A9) does not complain, it may be ignoring the invalidate
 request.

 While looking at this code I was wondering why we do not follow ARM's
 recommendation of 'break-make' updates of the TLB? I do not know we could
 support such a process because we may be asked to invalidate the entry for
 the text section we are running in to update it.

 Note, following the other path in the call works on a BBB.

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Ticket URL: <http://devel.rtems.org/ticket/3760>
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