[RTEMS Project] #3665: Add low level event recording infrastructure

[RTEMS trac]

#3665: Add low level event recording infrastructure
-----------------------------+------------------------------
 Reporter:  Sebastian Huber  |       Owner:  Sebastian Huber
     Type:  enhancement      |      Status:  assigned
 Priority:  normal           |   Milestone:  5.1
Component:  lib              |     Version:  5
 Severity:  normal           |  Resolution:
 Keywords:                   |  Blocked By:
 Blocking:                   |
-----------------------------+------------------------------

Comment (by Sebastian Huber <sebastian.huber@…>):

 In [changeset:"c331bdc7776b45f2f684565180df66ccbf5928f1/rtems"
 c331bdc/rtems]:
 {{{
 #!CommitTicketReference repository="rtems"
 revision="c331bdc7776b45f2f684565180df66ccbf5928f1"
 record: Allow tracing of ISR disable/enable

 Directly use the CPU port API in boot_card() to allow tracing of the
 higher level interrupt disable/enable routines, e.g.
 _ISR_Local_disable() and _ISR_Local_enable().  Currently, there is no
 configuration option to enable this.  Below is a patch.  It may be used
 to investigate some nasty low level bugs in the system.

 Update #3665.

 diff --git a/cpukit/include/rtems/score/isrlevel.h
 b/cpukit/include/rtems/score/isrlevel.h
 index c42451d010..46d361ddc2 100644
 --- a/cpukit/include/rtems/score/isrlevel.h
 +++ b/cpukit/include/rtems/score/isrlevel.h
 @@ -40,6 +40,10 @@ extern "C" {
   */
  typedef uint32_t   ISR_Level;

 +uint32_t rtems_record_interrupt_disable( void );
 +
 +void rtems_record_interrupt_enable( uint32_t level );
 +
  /**
   *  @brief Disables interrupts on this processor.
   *
 @@ -56,8 +60,7 @@ typedef uint32_t   ISR_Level;
   */
  #define _ISR_Local_disable( _level ) \
    do { \
 -    _CPU_ISR_Disable( _level ); \
 -    RTEMS_COMPILER_MEMORY_BARRIER(); \
 +    _level = rtems_record_interrupt_disable(); \
    } while (0)

  /**
 @@ -72,10 +75,7 @@ typedef uint32_t   ISR_Level;
   *  _ISR_Local_disable().
   */
  #define _ISR_Local_enable( _level ) \
 -  do { \
 -    RTEMS_COMPILER_MEMORY_BARRIER(); \
 -    _CPU_ISR_Enable( _level ); \
 -  } while (0)
 +  rtems_record_interrupt_enable( _level )

  /**
   *  @brief Temporarily enables interrupts on this processor.
 @@ -98,9 +98,8 @@ typedef uint32_t   ISR_Level;
   */
  #define _ISR_Local_flash( _level ) \
    do { \
 -    RTEMS_COMPILER_MEMORY_BARRIER(); \
 -    _CPU_ISR_Flash( _level ); \
 -    RTEMS_COMPILER_MEMORY_BARRIER(); \
 +    rtems_record_interrupt_enable( _level ); \
 +    _level = rtems_record_interrupt_disable(); \
    } while (0)

  /
 }}}

--
Ticket URL: <http://devel.rtems.org/ticket/3665#comment:43>
RTEMS Project <http://www.rtems.org/>
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