[RTEMS Project] #2902: Port RTEMS to Microblaze

[RTEMS trac]

#2902: Port RTEMS to Microblaze
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 Reporter:  Tanu Hari Dixit  |       Owner:  Joel Sherrill
     Type:  project          |      Status:  new
 Priority:  normal           |   Milestone:  Indefinite
Component:  bsps             |     Version:
 Severity:  normal           |  Resolution:
 Keywords:  SoC, BSP         |  Blocked By:
 Blocking:                   |
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Description changed by Gedare Bloom:

Old description:

> = Port RTEMS to Microblaze =
>

> '''Students:''' Past, Present, and Potential Students
>
> '''Status:''' The tools build from RSB properly, but GDB is not
> compatible with current XDM (Xilinx Debugging Module), Xilinx GDB version
> is working fine.
>
> '''Introduction:'''  A new architecture port, not just BSP. Include a BSP
> for GDB simulator. Also needs BSP for more complete HW on simulator.
>
> '''Goal:''' Concise statement of the overall goal of the project. Refine
> this initial statement to include: project deliverables (code, docs,
> testing), required/suggested methodology, standards of quality, possible
> goal extensions beyond the main objective.
>
> '''Requirements:''' List the requirements and level of expertise you
> estimate are required by the developer tackling this project will have to
> have: Required level of programming language(s), specific areas of RTEMS
> or tools, level of familiarity with RTEMS, cross-development, GNU/Linux,
> etx., development/documentation/testing tools, mathematical/algorithmic
> background, other desirable skills.
>
> '''Resources:''' Current RTEMS developers, papers, etc that may help you
> in this project.
>
> '''Acknowledgements'''
>  *  who helped and did work
>  *  Some work has been initiated here [1] (By Joel Sherrill and Hesham
> ALMatary) to get hello world working. It has been tested on Atlys FPGA
> board [2]. The BSP can run virtually on every FPGA board the Xilinx tools
> support building MicroBlaze on.
>
> = Miscellaneous Sections =
>
> As the project progresses, you will need to add build instructions, etc
> and this page will evolve from a project description into a HOWTO.
>
> = References =
>  * [1] https://github.com/heshamelmatary/rtems-microblaze
>  * [2] www.digilentinc.com/atlys/
>
> '''Other sections:''' If you have more to say about the project that
> doesn't fit in the proposed sections of this template, feel free to add
> other sections at will.

New description:

 = Port RTEMS to Microblaze =


 '''Students:''' Past, Present, and Potential Students

 '''Status:''' The tools build from RSB properly, but GDB is not compatible
 with current XDM (Xilinx Debugging Module), Xilinx GDB version is working
 fine.

 '''Introduction:'''  A new architecture port, not just BSP. Include a BSP
 for GDB simulator. Also needs BSP for more complete HW on simulator.

 '''Goal:''' Update the preliminary Microblaze port, complete clock timer
 support, merge into RTEMS, and continue to improve the BSP/port.

  *  Some work has been initiated here [1] (By Joel Sherrill and Hesham
 ALMatary) to get hello world working. It has been tested on Atlys FPGA
 board [2]. The BSP can run virtually on every FPGA board the Xilinx tools
 support building MicroBlaze on.

 = References =
  * [1] https://github.com/heshamelmatary/rtems-microblaze
  * [2] www.digilentinc.com/atlys/

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Ticket URL: <http://devel.rtems.org/ticket/2902#comment:4>
RTEMS Project <http://www.rtems.org/>
RTEMS Project