[RTEMS Project] #4775: RISC-V: Default BSPs to medany

[RTEMS trac]

#4775: RISC-V: Default BSPs to medany
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  Reporter:  Hesham Almatary  |      Owner:  (none)
      Type:  enhancement      |     Status:  new
  Priority:  normal           |  Milestone:
 Component:  admin            |    Version:
  Severity:  normal           |   Keywords:
Blocked By:                   |   Blocking:
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 Currently generic RISC-V BSPs (riscv/riscv) that start with rv* and not
 rv*_medany will start at 0x70000000. This adds high mainternace overhead
 and deviates from almost all other RISC-V-based OSes and baremetal program
 that start at 0x80000000. Further, testing now has to account for an extra
 parameter (medany or not) that doubles the number of BSPs need to be
 tested. RV32* currently don't have medany support as gcc/newlib doesn't
 build this. Thus, rv32 only currently runs on Spike as QEMU starts at
 0x80000000.

 It would be ideal to reduce maintenance efforts by defaulting all BSPs to
 medany and make them start at 0x80000000 to run on both QEMU and Spike.
 Those that need other cmodels or start addresses could be customised
 (e.g., rv64imac would default to medany but rv64imac_medlow won't).

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Ticket URL: <http://devel.rtems.org/ticket/4775>
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