[RTEMS Project] #4753: Encountered "fatal source: 9 (RTEMS_FATAL_SOURCE_EXCEPTION)" when booting up with RTEMS 6 on stm32h7 board

[RTEMS trac]

#4753: Encountered "fatal source: 9 (RTEMS_FATAL_SOURCE_EXCEPTION)" when booting
up with RTEMS 6 on stm32h7 board
-------------------------+-------------------------------------------------
  Reporter:  cal         |      Owner:  (none)
      Type:  defect      |     Status:  new
  Priority:  normal      |  Milestone:
 Component:  arch/arm    |    Version:  6
  Severity:  normal      |   Keywords:  fatal source: 9
                         |  (RTEMS_FATAL_SOURCE_EXCEPTION arm stm32h7
Blocked By:              |   Blocking:
-------------------------+-------------------------------------------------
 Hi,

 I have followed the RTEMS Quick Start webpage and have successfully built
 the BSP for stm32h7 (STM32H745I_DISCO board) with the RTEMS source code
 that I git cloned 2 weeks ago. I have successfully compiled a hello world
 application and ran on the board.

 This week, however, I repeated the steps to build the bsp but with the
 latest RTEMS git cloned. After successfully building the BSP and compiled
 the hello world application, I encountered an exception as shown below.

 *** FATAL ***
 fatal source: 9 (RTEMS_FATAL_SOURCE_EXCEPTION)

 R0   = 0x00000000 R8  = 0x00000000
 R1   = 0x00000002 R9  = 0x00000000
 R2   = 0x0000001c R10 = 0x00000000
 R3   = 0x240063a8 R11 = 0x00000000
 R4   = 0x00000001 R12 = 0xffffffff
 R5   = 0x00000000 SP  = 0x24006398
 R6   = 0x00000000 LR  = 0x0800d503
 R7   = 0x00000000 PC  = 0x0800d512
 XPSR = 0x210b0000 VEC = 0x00000004
 RTEMS version: 6.0.0.df814344215b6ec29d46238be47e3bbd2a2e22e4
 RTEMS tools: 12.2.1 20221104 (RTEMS 6, RSB
 f690701431fc88d0d79a56c41bc6a11d4641e60b, Newlib a8526cb)
 executing thread ID: 0x0a010001
 executing thð


 I did a comparison between the previous RTEMS code with the latest
 version.
 I replaced some of the codes in the latest code with the older codes.
 Below are the minimum changes that I did to make the board work.


 1) \cpukit\include\rtems\score\tls.h
 Added the lines of codes in the file:

 static inline uintptr_t _TLS_Align_up( uintptr_t val )
 {
   uintptr_t alignment = CPU_STACK_ALIGNMENT;

   return RTEMS_ALIGN_UP( val, alignment );
 }
 static inline void *_TLS_TCB_at_area_begin_initialize( void *tls_area )
 {
   void *tls_block = (char *) tls_area
     + _TLS_Get_thread_control_block_area_size();
   TLS_Thread_control_block *tcb = (TLS_Thread_control_block *) tls_area;
   uintptr_t aligned_size = _TLS_Align_up( (uintptr_t) _TLS_Size );
   TLS_Dynamic_thread_vector *dtv = (TLS_Dynamic_thread_vector *)
     ((char *) tls_block + aligned_size);

    _TLS_Initialize_TCB_and_DTV( tls_block, tcb, dtv );
     _TLS_Copy_and_clear( tls_block );
     return tls_block;
 }


 2) \cpukit\score\cpu\arm\armv7m-context-initialize.c
 Replaces the last line in the code:


 void _CPU_Context_Initialize(
   Context_Control *context,
   void *stack_area_begin,
   size_t stack_area_size,
   uint32_t new_level,
   void (*entry_point)( void ),
   bool is_fp,
   void *tls_area
 )
 {
   char *stack_area_end = (char *) stack_area_begin + stack_area_size;

   memset(context, 0, sizeof(*context));

   context->register_lr = entry_point;
   context->register_sp = stack_area_end;

   if ( tls_area != NULL ) {
     //_TLS_Initialize_area( tls_area );
     //replace the line with:
    ** _TLS_TCB_at_area_begin_initialize( tls_area );**
   }
 }



 3) \cpukit\score\cpu\arm\__aeabi_read_tp.c
 replace the codes:

 void __attribute__((naked)) __aeabi_read_tp(void)
 {
   __asm__ volatile (
     "ldr r0, =_Per_CPU_Information\n"
     "ldr r0, [r0, %[executingoff]]\n"
 #if defined(__thumb__) && !defined(__thumb2__)
     "add r0, %[tlsareaoff]\n"
     "ldr r0, [r0]\n"
 #else
     "ldr r0, [r0, %[tlsareaoff]]\n"
 #endif
     "bx lr\n"
     :
     : [executingoff] "I" (offsetof(Per_CPU_Control, executing)),
       [tlsareaoff] "I" (offsetof(Thread_Control, Start.tls_area))
   );
 }



 May I know if I might have configured the bsp wrongly during the build, or
 it is an actual bug that is introduced in the new code release?

 Thanks,
 Cal

--
Ticket URL: <http://devel.rtems.org/ticket/4753>
RTEMS Project <http://www.rtems.org/>
RTEMS Project