[RTEMS Project] #4923: FPU context init/switch not working well on more than 2 tasks on Cortex-Mx/ARMv7-M platform

[RTEMS trac]

#4923: FPU context init/switch not working well on more than 2 tasks on Cortex-
Mx/ARMv7-M platform
-----------------------+--------------------
  Reporter:  kgardas   |      Owner:  (none)
      Type:  defect    |     Status:  new
  Priority:  normal    |  Milestone:
 Component:  arch/arm  |    Version:
  Severity:  major     |   Keywords:
Blocked By:            |   Blocking:
-----------------------+--------------------
 While working on stm32h7 I've noted strange results from fpu calculations
 when several tasks are involved. I've minimized that to attach testcase.
 The testcase runs well on Xilinx/A9/Qemu and BeagleBone White platforms
 (ARMv7-A), but fails by providing wrong output on ARMv7-M (STM32H757i-
 eval).

 The core of the testcase is a comparison of power of two done on integer
 by shifting and by calling C pow function with using double. When there is
 discrepancy in comparison of those, error is signaled and counted. The
 output then prints number of test run/number of failures and this all for
 Init and 4 other tasks created. The first error in comparison is also
 signaled for every task where it happen by clear 'ERROR' message. The
 output from H7 looks like:

 {{{
 initializing...
 main task infinite loop.
 ERROR, computation failed in fpu_task_pow2
 ERROR, computation failed in fpu_task_pow3
 ERROR, computation failed in fpu_task_pow4
 ERROR, computation failed in Init
 INIT: 1000/1000, T1: 38985/0, T2: 39802/39802, T3: 39735/39735, T4:
 39804/39804
 INIT: 2000/1000, T1: 78030/0, T2: 79663/79663, T3: 79508/79508, T4:
 79650/79650
 INIT: 3000/1000, T1: 117100/0, T2: 119517/119517, T3: 119281/119281, T4:
 119513/119513
 INIT: 4000/2000, T1: 156138/0, T2: 159385/159385, T3: 159054/159054, T4:
 159355/159355
 INIT: 5000/2000, T1: 195198/0, T2: 199242/199242, T3: 198827/198827, T4:
 199195/199195
 INIT: 6000/2000, T1: 234238/0, T2: 239111/239111, T3: 238599/238599, T4:
 239054/239054
 INIT: 7000/2000, T1: 273278/0, T2: 278961/278961, T3: 278372/278372, T4:
 278903/278903
 INIT: 8000/2000, T1: 312315/0, T2: 318807/318807, T3: 318145/318145, T4:
 318740/318740
 INIT: 9000/2000, T1: 351353/0, T2: 358628/358628, T3: 357918/357918, T4:
 358600/358600
 INIT: 10000/2000, T1: 390393/0, T2: 398463/398463, T3: 397691/397691, T4:
 398444/398444
 INIT: 11000/2000, T1: 429431/0, T2: 438302/438302, T3: 437464/437464, T4:
 438279/438279
 INIT: 12000/2000, T1: 468470/0, T2: 478152/478152, T3: 477236/477236, T4:
 478123/478123
 INIT: 13000/2000, T1: 507506/0, T2: 518006/518006, T3: 517009/517009, T4:
 517961/517961
 ...
 }}}

 as you can see computation is always good (0 error) on T1 task while it is
 always bad on T2, T3, T4 tasks. Sometimes it is even bad on Init task.

 Expected output from BeagleBone looks:
 {{{
 initializing...
 main task infinite loop.
 INIT: 1000/0, T1: 8028/0, T2: 8042/0, T3: 8043/0, T4: 8043/0
 INIT: 2000/0, T1: 16053/0, T2: 16084/0, T3: 16084/0, T4: 16085/0
 INIT: 3000/0, T1: 24076/0, T2: 24125/0, T3: 24125/0, T4: 24126/0
 INIT: 4000/0, T1: 32097/0, T2: 32163/0, T3: 32165/0, T4: 32167/0
 INIT: 5000/0, T1: 40120/0, T2: 40204/0, T3: 40207/0, T4: 40208/0
 ...
 }}}

 The idea here is that task context initialization or switch is not working
 well on v7-M platform.

--
Ticket URL: <http://devel.rtems.org/ticket/4923>
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