[RTEMS Project] #4876: RISC-V BSP Variant for the Kendryte K210 SoC

[RTEMS trac]

#4876: RISC-V BSP Variant for the Kendryte K210 SoC
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  Reporter:  Alan Cudmore  |      Owner:  (none)
      Type:  enhancement   |     Status:  new
  Priority:  normal        |  Milestone:
 Component:  bsps          |    Version:
  Severity:  normal        |   Keywords:  risc-v, bsp
Blocked By:                |   Blocking:
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 The Kendryte K210 is low cost 64-bit dual core RISC-V SoC with:
 - Built in 8 MiB SRAM (6 for RISC-V applications, and 2 for the AI NPU)
 - An AI NPU
 - A number of other peripherals including UARTS, SPI, I2C, etc

 https://www.canaan.io/product/kendryteai
 https://www.seeedstudio.com/blog/2019/09/12/get-started-with-k210
 -hardware-and-programming-environment/

 While it is unclear how long these CPUs will be available, there are still
 low cost boards available that can run RTEMS including:
 https://wiki.sipeed.com/soft/maixpy/en/develop_kit_board/maix_bit.html
 https://wiki.sipeed.com/soft/maixpy/en/develop_kit_board/maix_duino.html

 In addition there is basic support for the SoC on the renode.io simulator:
 https://renode.io/
 https://github.com/renode/renode/blob/master/scripts/single-
 node/kendryte_k210.resc

 Caanan provides a standalone SDK with an Apache 2.0 license that has
 examples for using nearly all of the peripherals including the AI NPU.
 This could be used as a reference for future BSP support.
 https://github.com/kendryte/kendryte-standalone-sdk

 Basic RTEMS support for the device is a riscv/riscv BSP variant with only
 a few code changes, so it should be easy to maintain.

 The basic BSP variant is complete and supports a polled console that is
 shared with the frdme310arty variant, interrupt, and timer support. It
 uses a built in device tree blob similar to the Microchip polarfire
 variant.

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Ticket URL: <http://devel.rtems.org/ticket/4876>
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