[RTEMS Project] #4876: RISC-V BSP Variant for the Kendryte K210 SoC

RTEMS trac trac at rtems.org
Thu Mar 9 14:21:07 UTC 2023

#4876: RISC-V BSP Variant for the Kendryte K210 SoC
  Reporter:  Alan Cudmore  |      Owner:  (none)
      Type:  enhancement   |     Status:  new
  Priority:  normal        |  Milestone:
 Component:  bsps          |    Version:
  Severity:  normal        |   Keywords:  risc-v, bsp
Blocked By:                |   Blocking:
 The Kendryte K210 is low cost 64-bit dual core RISC-V SoC with:
 - Built in 8 MiB SRAM (6 for RISC-V applications, and 2 for the AI NPU)
 - An AI NPU
 - A number of other peripherals including UARTS, SPI, I2C, etc


 While it is unclear how long these CPUs will be available, there are still
 low cost boards available that can run RTEMS including:

 In addition there is basic support for the SoC on the renode.io simulator:

 Caanan provides a standalone SDK with an Apache 2.0 license that has
 examples for using nearly all of the peripherals including the AI NPU.
 This could be used as a reference for future BSP support.

 Basic RTEMS support for the device is a riscv/riscv BSP variant with only
 a few code changes, so it should be easy to maintain.

 The basic BSP variant is complete and supports a polled console that is
 shared with the frdme310arty variant, interrupt, and timer support. It
 uses a built in device tree blob similar to the Microchip polarfire

Ticket URL: <http://devel.rtems.org/ticket/4876>
RTEMS Project <http://www.rtems.org/>
RTEMS Project

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