RTEMS | x86_64: Fix ISR handler macros (!71)

[Joel Sherrill (@joel)]

Joel Sherrill commented on a discussion on cpukit/score/cpu/x86_64/include/rtems/score/cpu.h: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/71#note_108545

 > +  }                                                         \
 >  }
 >  
 >  #define _CPU_ISR_Disable(_level)                            \
 >  {                                                           \
 > -  amd64_enable_interrupts();                                \
 > -  _level = 1;                                               \
 > +  _level = _CPU_ISR_Get_level();                            \
 > +  amd64_disable_interrupts();                               \
 >    (void) _level; /* Prevent -Wunused-but-set-variable */    \
 >  }
 >  
 >  #define _CPU_ISR_Flash(_level)                              \
 >  {                                                           \
 > -  amd64_enable_interrupts();                                \
 > +  if(!_level) {                                             \

The interrupt disable is 32 bits to map cleanly from the public Classic APIs all the way down. As long as the CPU does not need more bits than that, we are ok.

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/71#note_108545
You're receiving this email because of your account on gitlab.rtems.org.


-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.rtems.org/pipermail/bugs/attachments/20240701/dc96317f/attachment-0001.htm>