RTEMS | x86_64: Enable and add support for FP tasks (!95)

Joel Sherrill (@joel) gitlab at rtems.org
Tue Jun 25 19:50:37 UTC 2024



Merge request https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/95 was reviewed by Joel Sherrill

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Joel Sherrill started a new discussion on bsps/x86_64/amd64/interrupts/isr_handler.S: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/95#note_108070

 > +  fxsave64 (rsp)
 > +  /* Reset to a clean state */
 > +  fninit

I am assuming the formatting looks better in the source code. Please make sure this looks reasonably formatted.

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Joel Sherrill started a new discussion on bsps/x86_64/amd64/interrupts/isr_handler.S: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/95#note_108071

 >  
 > +  /* Save x87 FPU, MMX and SSE state */
 > +.set FXSAVE_SIZE, 512

This alone implies that the ISR Stack size for x86_64 must be at least 512 bytes. Plus some more context saved and a little bit left for calling a driver, I would expect that anything less than 1K is very bad. Make sure there is a check for minimum ISR stack size. There likely is a check in confdefs about this.

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Joel Sherrill started a new discussion on bsps/x86_64/amd64/interrupts/isr_handler.S: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/95#note_108072

 > +.set FXSAVE_SIZE, 512
 > +  /* Make space for FXSAVE */
 > +  subq $FXSAVE_SIZE, rsp

Is this guaranteed to be 16 byte aligned as required?

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Joel Sherrill started a new discussion on bsps/x86_64/amd64/interrupts/isr_handler.S: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/95#note_108073

 > +  subq $FXSAVE_SIZE, rsp
 > +  fwait
 > +  fxsave64 (rsp)

I am not finding the number of cycles this save and the later restore can take. Is this a constant number of cycles or variable like the mc68881/2 were? It would be good to know this for some common CPU cores and document it.




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View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/95
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