RTEMS | Improve arm/xilinx-zynqmp-rpu BSP familiy (!230)

[Chris Johns (@chris)]

Chris Johns commented on a discussion: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/230#note_112747


A user will need to consider a memory map that works and that will be determined by their system design. An example (with make up bits and pieces) is:

```
[aarch64/zynqmp_apu]
BASE = 0x000a0000

[aarch64/zynqmp_rpu_0]
INHERIT = aarch64/zynqmp_rpu
BASE = 0x00010000
SIZE = 0x00040000
ZYQMP_RPU_INT_CONTROLLER_MODE = shared,primary

[aarch64/zynqmp_rpu_1]
INHERIT = aarch64/zynqmp_rpu
BASE = 0x00050000
SIZE = 0x00040000
ZYQMP_RPU_INT_CONTROLLER_MODE = shared,secondary
```

The user can build the suite of BSPs needed from the base ones we provide.

I have no idea if adjusting the base address of the APU like this works, it is just an example. It might be the RPU memory descend down from the top of the below 2G area.

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/230#note_112747
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