RTEMS | RISC-V: add support for using the MMU in S-Mode (!1182)

Sat Apr 4 02:58:01 UTC 2026

Kinsey Moore started a new discussion on bsps/riscv/shared/mmu/mmu-setup.c: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1182#note_148027

 > +    case 1:
 > +#if __riscv_xlen == 32
 > +      shift_bits = 12;
 > +#else
 > +      shift_bits = 21;
 > +#endif
 > +      break;
 > +
 > +    default:
 > +      bsp_fatal( RISCV_FATAL_MMU_CANNOT_MAP_BLOCK );
 > +  }
 > +
 > +#if __riscv_xlen == 32
 > +  mask = 0x3FF;
 > +#else
 > +  mask = 0x1FF;

These are correct, but the field widths should be used to define the bit shifts above and to create these masks.

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1182#note_148027
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