RTEMS | bsps/arm/tms570: fix self-test to work when internal SRAM is tested (!1187)

Gedare Bloom (@gedare) gitlab at rtems.org
Mon Apr 27 20:19:31 UTC 2026




Gedare Bloom commented on a discussion on bsps/arm/tms570/start/bspstarthooks-hwinit.c: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1187#note_149108

 >      /*
 >       * Enable ECC checking for TCRAM accesses.
 >       * This function enables the CPU's ECC logic for accesses to B0TCM and B1TCM.
 >       */
 >      _coreEnableRamEcc_();
 > +
 > +#if TMS570_VARIANT == 3137
 > +    /* Test the CPU ECC mechanism for RAM accesses.
 > +     * The checkBxRAMECC functions cause deliberate single-bit and double-bit errors in TCRAM accesses
 > +     * by corrupting 1 or 2 bits in the ECC. Reading from the TCRAM location with a 2-bit error
 > +     * in the ECC causes a data abort exception. The data abort handler is written to look for
 > +     * deliberately caused exception and to return the code execution to the instruction
 > +     * following the one that caused the abort.
 > +     */
 > +#if 0
 > +    /* Disabled for now, requires specific support in data abort handler */

That's fine, you can resolve this with an Issue if you like.

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1187#note_149108
You're receiving this email because of your account on gitlab.rtems.org.


-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.rtems.org/pipermail/bugs/attachments/20260427/a72242ee/attachment-0001.htm>


More information about the bugs mailing list