RTEMS | bsps/raspberrypi5: Add SMP support (!1072)

[Preetam Das (@lostux)]

Preetam Das commented on a discussion on bsps/aarch64/raspberrypi5/start/bspsmp.c: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1072#note_143305

 > +{
 > +  uint32_t PSCI_FN_SYSTEM_CPU_ON = 0xC4000003;
 > +	/* Core IDs are in AFF1 in the Pi5 */
 > +  uint64_t target_cpu = (uint64_t) cpu_index << 8;
 > +  uint64_t ret;
 > +
 > +  __asm__ volatile (
 > +    "mov x0, %1\n"
 > +    "mov x1, %2\n"
 > +    "mov x2, %3\n"
 > +    "mov x3, #0\n"
 > +    "smc #0\n"
 > +    "mov %0, x0\n"
 > +    : "=r" ( ret ) : "r" ( PSCI_FN_SYSTEM_CPU_ON ), "r" ( target_cpu ),
 > +    "r" ( (uint64_t) _start ) : "x0", "x1", "x2", "x3", "memory"
 > +  );

If I am right, then the implementation in `bsps/shared/start/bspsmp-arm-psci.c` assumes that the core IDs are always in AFF0. The bitwise OR constructs `target_cpu` such that core IDs are in AFF0, but the PI5 has it in AFF1. In my implementation, we shift the core IDs up in AFF1. So, it is not a duplication.

```c
   target_cpu &= ~( 0xff0000ffUL ); 
   target_cpu |= cpu_index;         
```

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1072#note_143305
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