RTEMS | [aarch64] Implement _CPU_Spin_wait() in cpu.h for SMP spin-loop throttling (#5643)

[Wayne Thornton (@wmthornton-dev)]

Issue created by Wayne Thornton: https://gitlab.rtems.org/rtems/rtos/rtems/-/work_items/5643



## Description:
We have introduced a new Super Core architecture hook, `_CPU_Spin_wait()`, to mitigate aggressive speculative execution penalties, reduce thermal load, and lower bus contention during SMP spin-wait polling loops. The reference template is currently documented in `cpukit/score/cpu/no_cpu/include/rtems/score/cpu.h` and natively implemented for x86_64 upon merging of rtems/rtos/rtems!1256.

The aarch64 architecture port needs to override the default fallback by implementing a native inline assembly pipeline throttle in `cpukit/score/cpu/aarch64/include/rtems/score/cpu.h`.

Suggested Implementation:
For AArch64, this should utilize the architectural `yield` instruction paired with a compiler memory clobber:

```
static inline void _CPU_Spin_wait( void )
{
  __asm__ volatile( "yield" ::: "memory" );
}
#define _CPU_Spin_wait _CPU_Spin_wait
```

## Verification:
Validate that the implementation compiles cleanly and passes the standalone SMP spin-wait test suite: `testsuites/smptests/smpspinwait01`. Once defined, the preprocessor will automatically override the temporary test-level fallback in `init.c`.

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-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/work_items/5643
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