Central | spec/rtems/intr: skip validation of InvPrio for riscv (!20)

[Gedare Bloom (@gedare)]

Reassigned merge request 20

https://gitlab.rtems.org/rtems/prequal/rtems-central/-/merge_requests/20

Gedare Bloom was added as an assignee.

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View it on GitLab: https://gitlab.rtems.org/rtems/prequal/rtems-central/-/merge_requests/20
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