RTEMS | bsps/arm/imx: Fix GIC IRQ number calculation (!1306)

[Yang Zhang (@Chloe)]

Yang Zhang created a merge request: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1306

Project:Branches: Chloe/rtems:fix-gic-ppi-irq-mapping to rtems/rtos/rtems:main
Author:   Yang Zhang



## Summary

The ARM GIC device tree binding defines three cells per interrupt entry:

cell\[0\]: interrupt type  (0 = SPI, 1 = PPI)

cell\[1\]: interrupt number  (relative to the type base)

cell\[2\]: trigger flags  (no effect on the INTID calculation)

 

The GIC hardware INTID layout is:

0-15:  SGI

16-31:  PPI

32+:    SPI

Therefore the correct absolute hardware INTID is:

SPI (type 0): irq_number + 32

PPI (type 1): irq_number + 16

 

The previous code used a hard-coded offset of 32 for all interrupts in

both imx_get_irq_of_node() and bsp_fdt_map_intr(), ignoring the

interrupt type entirely.

 

The ARM generic timer (used in arm_generic_timer_get_config()) is a PPI

interrupt. Since its correct offset is 16 rather than 32, the previous

code compensated with a manual "- 16" adjustment at the call site,

accompanied by a FIXME comment.

 

Fix this by reading cell\[0\] in both imx_get_irq_of_node() and

bsp_fdt_map_intr() and selecting the correct offset based on the

interrupt type, as specified by the ARM GIC device tree binding and

implemented by the Linux GIC driver. Remove the unnecessary

adjustment and FIXME comment.

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