RTEMS | risc-v: support running in s-mode (!1086)

[Gedare Bloom (@gedare)]

Gedare Bloom started a new discussion on bsps/riscv/riscv/irq/irq.c: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1086#note_144273

 >  
 > -void _RISCV_Interrupt_dispatch(uintptr_t mcause, Per_CPU_Control *cpu_self)
 > +#endif /* !RISCV_USE_S_MODE */
 > +
 > +#ifdef RISCV_USE_S_MODE
 > +
 > +static void riscv_interrupt_dispatch_supervisor(
 > +    uintptr_t scause,
 > +    Per_CPU_Control *cpu_self
 > +)
 > +{
 > +#ifndef RTEMS_SMP
 > +  (void) cpu_self;
 > +#endif
 > +
 > +  if (scause & RISCV_INTERRUPT_TIMER_SUPERVISOR) {

This is wrong and works by accident.

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1086#note_144273
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