RTEMS | riscv/riscv clockdrv may bsp_fatal even with correct behaviour/initialization (#5486)
Gedare Bloom (@gedare)
gitlab at rtems.org
Wed Mar 4 22:08:54 UTC 2026
Gedare Bloom commented on a discussion: https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5486#note_144280
I encountered this on qemu with SMP. I see the same logic exists in arm (`a9mpcore_clock_secondary_initialization`). I don't know what it is really intending to do, because `cmpval - now > interval` should never happen, while `cmpval - now == interval` may happen in extreme circumstances.
I would just get rid of this check.
@sebhub ?
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View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5486#note_144280
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