RTEMS | Draft: riscv: s-mode use SBI for timer, reset, and SMP support (!1108)

[Gedare Bloom (@gedare)]

Gedare Bloom created a merge request: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1108

Project:Branches: gedare/rtems:riscv-sbi-smp to rtems/rtos/rtems:main
Author:   Gedare Bloom
Assignee: Gedare Bloom


## Summary

This is basically ready, but it includes the commits from !1086 and !1092.

Use the SBI in s-mode to handle timers if the Sstc extension is not available for s-mode timers, bsp reset (shutdown), and to support SMP IPIs. 

SMP support is working well.

Testing smptests:

With S-Mode:
```
Passed:        59
Failed:         1
User Input:     0
Expected Fail:  0
Indeterminate:  0
Benchmark:      0
Timeout:        0
Test too long:  0
Invalid:        0
Wrong Version:  0
Wrong Build:    0
Wrong Tools:    0
Wrong Header:   0
-----------------
Total:         60

Failures:
 smpmrsp01.exe
```

Without S-Mode (using m-mode):
```
Passed:        59
Failed:         1
User Input:     0
Expected Fail:  0
Indeterminate:  0
Benchmark:      0
Timeout:        0
Test too long:  0
Invalid:        0
Wrong Version:  0
Wrong Build:    0
Wrong Tools:    0
Wrong Header:   0
-----------------
Total:         60

Failures:
 smpmrsp01.exe
```

Closes #3337 

Fixes #5486

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