RTEMS | bsps/i386: Standardize APIC register definitions with x86_64 BSP (!1111)
SHIVAM DEOLANKAR (@D3athSkulll)
gitlab at rtems.org
Sat Mar 7 23:31:26 UTC 2026
SHIVAM DEOLANKAR commented: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1111#note_144782
I consolidated the APIC definitions by removing the pc386 header (`bsps/i386/include/bsp/apic.h`) and making pc386 include `<apic.h>`, which resolves to `bsps/x86_64/amd64/include/apic.h`.
The pc386 code was updated to use the same array-based LAPIC access pattern as x86_64, replacing pointer arithmetic and `IMPS_LAPIC_READ/WRITE` with:
amd64_lapic_base\[LAPIC_REGISTER\_\*\]
Old macros (`LAPIC_ID`, `LAPIC_EOI`, `LAPIC_SPIV`, `LAPIC_ICR`) were replaced with the x86_64 definitions (`LAPIC_REGISTER_*`).
Verification performed:
* Confirmed the pc386 APIC header is removed.
* Confirmed pc386 includes `<apic.h>`.
* Verified pc386 uses `amd64_lapic_base[LAPIC_REGISTER_*]`.
* Verified `IMPS_LAPIC_*` macros are no longer used in pc386 code.
* Built and tested the `pc386` BSP successfully.
The screenshot shows these verification checks (`git grep` results) confirming the new access pattern and absence of the old macros.
{width=900 height=449}
--
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1111#note_144782
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