RTEMS | aarch64/xilinx-zynqmp: Use FDT to define PCIe memory mappings (!1116)
SHIVAM DEOLANKAR (@D3athSkulll)
gitlab at rtems.org
Thu Mar 12 02:14:45 UTC 2026
SHIVAM DEOLANKAR commented on a discussion on bsps/aarch64/xilinx-zynqmp/start/mmu-config.c: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1116#note_145109
> aarch64_mmu_config_table[] = {
> AARCH64_MMU_DEFAULT_SECTIONS,
> {
> -#ifdef ZYNQMP_MMU_PCIE_ENABLE
> - /* PCIe low */
> - .begin = 0xe0000000,
> - .end = 0xf0000000,
> - .flags = AARCH64_MMU_DEVICE
> - }, {
> -#endif /* ZYNQMP_MMU_PCIE_ENABLE */
The previous BSP implementation defined the PCIe mappings statically in `mmu-config.c`. I verified the original mappings (`0xe0000000–0xf0000000`, `0x600000000–0x800000000`, and `0x8000000000–0xc000000000`) from the current `main` branch. The implementation now in updated MR derives the mapping from the device tree when a PCIe node is present and falls back to the same static mappings otherwise. This preserves the previous BSP behaviour and avoids breaking existing users.
--
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1116#note_145109
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