RTEMS | riscv: s-mode use SBI for timer, reset, and SMP support (!1108)
Matteo Concas (@matteo.concas)
gitlab at rtems.org
Thu Mar 12 07:18:07 UTC 2026
Matteo Concas commented on a discussion on bsps/riscv/riscv/start/bspsmp.c: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1108#note_145133
> {
> Per_CPU_Control *cpu;
>
> - cpu = _Per_CPU_Get_by_index(target_processor_index);
> #ifdef RISCV_USE_S_MODE
> - /* TODO: Add IPI call. */
> + uint32_t hartid;
> + unsigned long hart_mask;
> (void) cpu;
> +
> + hartid = _RISCV_Map_cpu_index_to_hartid(target_processor_index);
> + hart_mask = 1UL << hartid;
> + sbi_send_ipi(&hart_mask);
> #else
> + cpu = _Per_CPU_Get_by_index(target_processor_index);
Generally I prefer having all declarations at the start of a function (or at the start of the scope) but it can add clutter when you start using define blocks..
--
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1108#note_145133
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