RTEMS | RISC-V S-mode BSP can trigger spurious interrupts (#5522)

[Matteo Concas (@matteo.concas)]

Matteo Concas created an issue: https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5522



## Summary
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In applications where `CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER` is not defined and the previous boot stage did not set `stimecmp` to its maximum value, RTEMS might exit with fatal source `RTEMS_FATAL_SOURCE_SPURIOUS_INTERRUPT`.

This is due to a supervisor timer interrupt happening while no interrupt entry had been installed for this vector (since the clock driver is not used).


Normally the supervisor timer interrupt should not be enabled in that case but in `bsps/riscv/riscv/irq/irq.c:674` it is enabled when the supervisor software interrupt should be enabled instead:
```c
rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
{
...
_Assert(vector == RISCV_INTERRUPT_VECTOR_SOFTWARE);
#ifdef RISCV_USE_S_MODE
  set_csr(sie, SIP_STIP);
#else
  set_csr(mie, MIP_MSIP);
#endif
```

The same error is also present in `bsp_interrupt_vector_disable()`

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View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5522
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