RTEMS | riscv: fix spurious interrupt by using SIP_SSIP instead of SIP_STIP (!1124)

[Kinsey Moore (@opticron)]

Kinsey Moore commented on a discussion on bsps/riscv/riscv/irq/irq.c: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1124#note_145728

 >  
 >    if (vector == RISCV_INTERRUPT_VECTOR_TIMER) {
 >  #ifdef RISCV_USE_S_MODE
 > -    *pending = (read_csr(sip) & SIP_STIP) != 0;
 > +  set_csr(sie, SIP_SSIP);
 >  #else
 > -    *pending = (read_csr(mip) & MIP_MTIP) != 0;
 > +  set_csr(mie, MIP_MSIP);

Yes, that is impetus for the changes to lines 487 and 746. That does not explain the other changes to lines 478 and 480. Saying that "it was incorrect" is accurate, but does not explain what motivated the change.

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1124#note_145728
You're receiving this email because of your account on gitlab.rtems.org.


-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.rtems.org/pipermail/bugs/attachments/20260316/3773f02f/attachment-0001.htm>