RTEMS | docs: fix spelling, grammar, and register names in include folder (!1130)
Mohamed Ayman (@mohamedayman23)
gitlab at rtems.org
Wed Mar 18 21:40:29 UTC 2026
Mohamed Ayman commented on a discussion on bsps/arm/stm32f4/include/bsp/stm32_usart.h: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1130#note_146134
> #define STM32F4_USART_DR_GET(reg) BSP_FLD32GET(reg, 0, 7)
> #define STM32F4_USART_DR_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
> - uint32_t bbr;
> -#define STM32F4_USART_BBR_DIV_MANTISSA(val) BSP_FLD32(val, 4, 15)
> -#define STM32F4_USART_BBR_DIV_MANTISSA_GET(reg) BSP_FLD32GET(reg, 4, 15)
> -#define STM32F4_USART_BBR_DIV_MANTISSA_SET(reg, val) BSP_FLD32SET(reg, val, 4, 15)
> -#define STM32F4_USART_BBR_DIV_FRACTION(val) BSP_FLD32(val, 0, 3)
> -#define STM32F4_USART_BBR_DIV_FRACTION_GET(reg) BSP_FLD32GET(reg, 0, 3)
> -#define STM32F4_USART_BBR_DIV_FRACTION_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
> + uint32_t brr;
> +#define STM32F4_USART_BRR_DIV_MANTISSA(val) BSP_FLD32(val, 4, 15)
> +#define STM32F4_USART_BRR_DIV_MANTISSA_GET(reg) BSP_FLD32GET(reg, 4, 15)
> +#define STM32F4_USART_BRR_DIV_MANTISSA_SET(reg, val) BSP_FLD32SET(reg, val, 4, 15)
> +#define STM32F4_USART_BRR_DIV_FRACTION(val) BSP_FLD32(val, 0, 3)
> +#define STM32F4_USART_BRR_DIV_FRACTION_GET(reg) BSP_FLD32GET(reg, 0, 3)
> +#define STM32F4_USART_BRR_DIV_FRACTION_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
{width=900 height=284}
it was an effect in usart.c and i edit it and this image shows in the search in the main repo with (STM32_USART_BBR\_) the old one and the lower search shows the edit in my branch after changing BBR to BRR
--
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1130#note_146134
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