RTEMS | docs: fix spelling, grammar, and register names in include folder (!1130)

Mohamed Ayman (@mohamedayman23) gitlab at rtems.org
Sat Mar 21 00:30:36 UTC 2026




Mohamed Ayman commented on a discussion on bsps/arm/stm32f4/include/bsp/stm32_usart.h: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1130#note_146580

 >  #define STM32F4_USART_DR_GET(reg) BSP_FLD32GET(reg, 0, 7)
 >  #define STM32F4_USART_DR_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
 > -	uint32_t bbr;
 > -#define STM32F4_USART_BBR_DIV_MANTISSA(val) BSP_FLD32(val, 4, 15)
 > -#define STM32F4_USART_BBR_DIV_MANTISSA_GET(reg) BSP_FLD32GET(reg, 4, 15)
 > -#define STM32F4_USART_BBR_DIV_MANTISSA_SET(reg, val) BSP_FLD32SET(reg, val, 4, 15)
 > -#define STM32F4_USART_BBR_DIV_FRACTION(val) BSP_FLD32(val, 0, 3)
 > -#define STM32F4_USART_BBR_DIV_FRACTION_GET(reg) BSP_FLD32GET(reg, 0, 3)
 > -#define STM32F4_USART_BBR_DIV_FRACTION_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
 > +	uint32_t brr;
 > +#define STM32F4_USART_BRR_DIV_MANTISSA(val) BSP_FLD32(val, 4, 15)
 > +#define STM32F4_USART_BRR_DIV_MANTISSA_GET(reg) BSP_FLD32GET(reg, 4, 15)
 > +#define STM32F4_USART_BRR_DIV_MANTISSA_SET(reg, val) BSP_FLD32SET(reg, val, 4, 15)
 > +#define STM32F4_USART_BRR_DIV_FRACTION(val) BSP_FLD32(val, 0, 3)
 > +#define STM32F4_USART_BRR_DIV_FRACTION_GET(reg) BSP_FLD32GET(reg, 0, 3)
 > +#define STM32F4_USART_BRR_DIV_FRACTION_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)

i update the renaming the struct element in bsps/arm/stm32f4/console/usart.c.

and compile it, thanks kinsey

![Screenshot from 2026-03-21 02-24-43.png](/uploads/124b935cc7a5d24c86be3f1764e81cb0/Screenshot_from_2026-03-21_02-24-43.png){width=900 height=473}

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1130#note_146580
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