RTEMS | riscv: enable using PLIC in S-mode (!1242)

[Gedare Bloom (@gedare)]

Gedare Bloom commented on a discussion on bsps/riscv/riscv/irq/irq.c: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1242#note_150099

 > -    bsp_fatal(RISCV_FATAL_UNEXPECTED_INTERRUPT_EXCEPTION);
 > -  }
 > -}
 > -
 > -#else
 >  
 > -static void riscv_interrupt_dispatch_machine(
 > -    uintptr_t mcause,
 > -    Per_CPU_Control *cpu_self
 > -)
 > -{
 >    /*
 >     * Get rid of the most significant bit which indicates if the exception was
 >     * caused by an interrupt or not.
 >     */
 >    mcause <<= 1;

yeah, updated

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1242#note_150099
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