RTEMS | bsp/arm/tms570: SDRAM init runs too late to align with 4357x EMIF#5 workaround (#5591)

[Avi Weiss (@thnkslprpt)]

Avi Weiss created an issue: https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5591



## Summary
As noted in EMIF#5 (TMS570LC4x Microcontroller Silicon Errata (Silicon Revision B)), and already referenced in the code comments in `tms570_emif_sdram_init()` (line 144 in `bsps/arm/tms570/start/hwinit-lc4357-hdk.c`) we should follow the workaround recommended in the Errata:  
_For systems operating with an EMIF clock frequency `≥ 40 MHz`, initialize the SDRAM while the EMIF clock source is still `< 40 MHz`. This means that the SDRAM should be initialized while the device is still operating from the `OSCIN` clock source, before it switches to the faster PLL-based clock source._  

The problem is, `tms570_emif_sdram_init` is currently called very late - after `tms570_system_hw_init` (which calls `tms570_map_clock_init`) -> this ordering directly contradicts the code comments and the Errata workaround recommendation.  

I think the call-flow was refactored at some point and `tms570_emif_sdram_init` moved from before `tms570_map_clock_init` to after. The comments seem to indicate this.  

## Steps to reproduce
Code-walkthrough starting at `tms570_system_hw_init`  

## Expected behaviour
We are supposed to do the SDRAM init earlier, while the EMIF clock is still using `OSCIN` (only for 4357 - the 3137x doens't seem to have the same issue).

-- 
View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/issues/5591
You're receiving this email because of your account on gitlab.rtems.org.


-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.rtems.org/pipermail/bugs/attachments/20260526/c1f616bb/attachment.htm>