[PATCH] Print MCSR and ESR.
Ric Claus
claus at slac.stanford.edu
Sat Dec 1 00:12:59 UTC 2012
The Machine Check and Exception Syndrome Registers on Book-E and Book-E-like
processors contain useful information for decoding the cause of an exception.
NB: This patch depends on the PR 2048 patch sent earlier having been applied.
---
.../new-exceptions/bspsupport/ppc_exc_print.c | 21 ++++++++++++++++---
cpukit/score/cpu/powerpc/rtems/powerpc/registers.h | 5 ++++
2 files changed, 22 insertions(+), 4 deletions(-)
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_print.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_print.c
index 34233ba..6172ab6 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_print.c
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_print.c
@@ -45,9 +45,9 @@ static uint32_t ppc_exc_get_DAR_dflt(void)
break;
case PPC_BOOKE_STD:
case PPC_BOOKE_E500:
- return PPC_SPECIAL_PURPOSE_REGISTER(DEAR_BOOKE);
+ return PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_DEAR);
case PPC_BOOKE_405:
- return PPC_SPECIAL_PURPOSE_REGISTER(DEAR_405);
+ return PPC_SPECIAL_PURPOSE_REGISTER(PPC405_DEAR);
}
return 0xdeadbeef;
}
@@ -157,11 +157,24 @@ void _BSP_Exception_frame_print(const CPU_Exception_frame *excPtr)
/* Would be great to print DAR but unfortunately,
* that is not portable across different CPUs.
* AFAIK on classic PPC DAR is SPR 19, on the
- * 405 we have DEAR = SPR 0x3d5 and booE says
+ * 405 we have DEAR = SPR 0x3d5 and bookE says
* DEAR = SPR 61 :-(
*/
if (ppc_exc_get_DAR != NULL) {
- printk(" DAR = 0x%08x\n", ppc_exc_get_DAR());
+ char* reg = ppc_cpu_is_60x() ? " DAR" : "DEAR";
+ printk(" %s = 0x%08x\n", reg, ppc_exc_get_DAR());
+ }
+ if (ppc_cpu_is_bookE()) {
+ unsigned esr, mcsr;
+ if (ppc_cpu_is_bookE() == PPC_BOOKE_405) {
+ esr = PPC_SPECIAL_PURPOSE_REGISTER(PPC405_ESR);
+ mcsr = PPC_SPECIAL_PURPOSE_REGISTER(PPC405_MCSR);
+ } else {
+ esr = PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_ESR);
+ mcsr = PPC_SPECIAL_PURPOSE_REGISTER(BOOKE_MCSR);
+ }
+ printk(" ESR = 0x%08x\n", esr);
+ printk(" MCSR = 0x%08x\n", mcsr);
}
if (executing != NULL) {
diff --git a/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h b/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h
index 008e387..7090203 100644
--- a/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h
+++ b/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h
@@ -299,6 +299,11 @@ lidate */
#define BOOKE_DECAR 54
+#define PPC405_MCSR 0x23C
+#define PPC405_ESR 0x3D4
+#define PPC405_DEAR 0x3D5
+#define BOOKE_DEAR 61
+
#define PPC405_TSR 0x3D8
#define BOOKE_TSR 336
#define BOOKE_TSR_ENW (1<<31)
--
1.7.1
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