Creating an BSP for Microblaze?
sebastian.huber at embedded-brains.de
Tue Dec 4 17:28:30 UTC 2012
On 04/12/12 16:09, Matthias Goldhoorn wrote:
> Hello Devel's,
> we are currently thinking about using rtems on out Suzaku-S Boards.
> This boards carry an Xilinx Spartan FPGA, we currently using an
> Microblaze Processor and µCLinux.
> We maybe want to swap no rtems.
> First and most important question:
> 1. Is there any ongoing work to create BSPs for the microblaze arch?,
I don't know.
> I already saw that the gcc-toolchain was already created to build for
> this target.
> 2. If not, how log you are assuming do an Computer Scientist without
> any RTEMS knowledge need to create an BSP for this?
Lets suppose the tool chain works, then the next step is to do the basic
CPU port. This includes primitive ABI settings like stack alignment and
more complex stuff like context switching and interrupt handling. You
have to do the low level system initialization on a simulator or
evaluation board (set up C runtime environment, cache, memory
controller, PLL, etc.). This is largely operating system independent.
You have to create drivers for basic thinks like the clock tick and
console. You have to learn the development environment for the FPGA.
It is hard to estimate a time frame for all of this. I would say its
more than three weeks. It might be more efficient to hire a company for
Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone : +49 89 18 90 80 79-6
Fax : +49 89 18 90 80 79-9
E-Mail : sebastian.huber at embedded-brains.de
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