Interrupt gate in x86

[Gedare Bloom]

I can't say specifically for i386. But in general nested interrupts
are handled when possible by either using a hw-managed interrupt stack
when available or a separate distinct software stack for interrupt
handlers. Stack management is then dealt with during ISR_Handler code
which (in simple-vectored) just gets vectored to directly with a
number to indicate the interrupt source. PIC targets may be a bit
different and I'm not familiar with them.

You should see where the isr handler gets invoked from the i386
interrupt handler code to see if the nested interrupt is re-enabled
before executing the user handler in order to answer your question.

On Sun, Jul 1, 2012 at 7:26 AM, Fered <a_Fered at yahoo.com> wrote:
> Nobody can help me?!
>
> Fered wrote:
>> Hi;
>>
>> In the following file:
>> c/src/lib/libbsp/i386/shared/irq/idt.c
>> in the following function:
>> create_interrupt_gate_descriptor ()
>> interrupt descriptor type, set to 0xe. It mean "Interrupt Gate" has been
>> used. Interrupt gate clears IF flag then prevents nested interrupts. But I
>> think nested interrupt handling implemented in RTEMS, according to usage of
>> "_ISR_Nest_level" variable.
>> Can anyone tell me how nesting implemented in interrupt handler of RTEMS?
>>
>> Thanks.
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