"Butter bei de Fische" was: Re: [PATCH v3] score: PR1607: Add and use CPU_SIZEOF_POINTER

[Sebastian Huber]

Hello Ralf,

did you already look at this example?  It shows the fundamental problems with 
inline asm.  Depending on the pointer size you need a "mov.w" or "mov.l" 
instruction.

On 11/09/2012 01:50 PM, Sebastian Huber wrote:
> On 11/09/2012 08:44 AM, Thomas Doerfler wrote:
>> Sebastian, Ralf, can you both identify a typical piece of assembly code, that
>> might be recoded into a more portable code? We could then consider, which
>> versions
>> - meet the portability requirements
>> - meet the performance requirements
>> - are readable and maintainable
>> - interface properly to the C portion of the code
>
> One interesting piece of assembler is this:
>
> http://git.rtems.org/rtems/tree/cpukit/score/cpu/h8300/cpu_asm.S
>
> [...]
> SYM(_ISR_Handler):
> #if defined(__H8300H__) || defined(__H8300S__) || defined(__H8300SX__)
>      mov.l    er1, at -er7
>      mov.l    er2, at -er7
>      mov.l    er3, at -er7
>      mov.l    er4, at -er7
>      mov.l    er5, at -er7
>      mov.l    er6, at -er7
>
> /*  Set IRQ Stack */
>      orc        #0xc0,ccr
>      mov.l    er7,er6        ; save stack pointer
>      mov.l    @ISR_NEST_LEVEL,er1
>      bne        nested
>      mov.l    @INTERRUPT_STACK_HIGH,er7
>
> nested:
>      mov.l    er6, at -er7    ; save sp so pop regardless of nest level
> [...]
>
> Firstly it uses:
>
> #if defined(__H8300H__) || defined(__H8300S__) || defined(__H8300SX__)
>
> which corresponds exactly to the part in my patch:
>
> diff --git a/cpukit/score/cpu/h8300/rtems/score/cpu.h
> b/cpukit/score/cpu/h8300/rtems/score/cpu.h
> index ea9d443..1811ce7 100644
> --- a/cpukit/score/cpu/h8300/rtems/score/cpu.h
> +++ b/cpukit/score/cpu/h8300/rtems/score/cpu.h
> @@ -497,6 +497,12 @@ SCORE_EXTERN Context_Control_fp  _CPU_Null_fp_context;
>
>   #define CPU_STACK_MINIMUM_SIZE          (1536)
>
> +#if defined(__H8300H__) || defined(__H8300S__) || defined(__H8300SX__)
> +  #define CPU_SIZEOF_POINTER 4
> +#else
> +  #define CPU_SIZEOF_POINTER 2
> +#endif
> +
>   /*
>    *  CPU's worst alignment requirement for data types on a byte boundary.  This
>    *  alignment does not take into account the requirements for the stack.
>
> Secondly it uses:
>
> mov.l    @INTERRUPT_STACK_HIGH,er7
>
> This is an indirect 32-bit load from address INTERRUPT_STACK_HIGH (part of
> _Per_CPU_Information).
>
> I really like to see the trivial inline asm that can be used here.
>


-- 
Sebastian Huber, embedded brains GmbH

Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone   : +49 89 18 90 80 79-6
Fax     : +49 89 18 90 80 79-9
E-Mail  : sebastian.huber at embedded-brains.de
PGP     : Public key available on request.

Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.