atomic support for RTEMS
wei.a.yang at gmail.com
Tue Apr 2 14:25:22 UTC 2013
The project atomic support for RTEMS a GSOC2012 proposal which implemented architecture-independent API design and two architecture X86 and powerpc support. This year i will continue to doing more work to implement this project. The main tasks include:
1. implement a series of general atomic ops for unprocesse.
As we know the atomic instruction has performence cost because of costs of cache misses. There is a picture which list atomic instruction costs. The atomic instruction introduces instruction execution uncertainty. So if the architecture does not support SMP mode it should use general atomic ops which rely the Disable/Enable-IRQ method.
2. support atomic primitive for more architectures like ARM,MIPS,SPARC,etc.
If the architecture supports SMP mode(define macro RTEMS_SMP)it will use its own atomic hardware instruction, otherwise it will use general atomic ops.
3. update atomic implementation with the latest freebsd(the powerpc and x86 implementation is ported from freebsd).
4. make existing kinds of synchronization primitives on RTEMS support SMP and to add some new SMP-safe synchronization primitives based on atomic operations.
RTEMS existing synchronization primitives:
5. If possible i want to implement some lock-free algorithms or data structures based on atomic ops.
This just my preliminary ideas if you have any comment and requirement please repley freely.
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