Atomic Operations and Required Architecture Support for RTEMS SMP

Sebastian Huber sebastian.huber at embedded-brains.de
Wed Aug 28 14:50:30 UTC 2013


On 2013-08-28 16:26, Deng Hengyi wrote:
>
> 在 2013-8-28,下午9:19,Sebastian Huber <sebastian.huber at embedded-brains.de> 写道:
>
>> Hello,
>>
>> as part of a GSoC project we made the atomic operations API compatible with the C11 operations and use them for the implementation.  I added some tests today and now begin to think if this was really such a good idea:
>>
>> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58259
>>
>> Surprisingly it seems that the atomic operations support is not shared by the C and C++ compiler parts in GCC.
>>
> Should this issue be a gcc bug which should be fixed by gcc?

Provided my test code is ok and this is actually a GCC problem, I don't expect 
this will be fixed soon.  This potential bug is there for more than one year 
and nobody noticed.  Anyway this simple atomic flag is next to useless for 
serious SMP stuff.

See also http://en.wikipedia.org/wiki/Test-and-set, search for consensus number.

The generated PowerPC code for _SMP_barrier_Wait() which uses the unsigned 
integer atomic operations in smptests/smpatomic08 is actually quite good.

>> I just realized that the C11 atomic_flag type has no load operation.  This makes it not suitable to implement a simple test and test and set lock.  So this type is useless for us.  The only special thing with atomic_flag is that it is guaranteed to be lock free.  This is the minimum requirement for atomic operations.
>>
> In the stdatomic.h and C11 standard it has defined a API atomic_flag_test_and_set_explicit, so it should support atomic test and set ops. If we encounter the error we should consider whether the gcc for this architecture is not supported or gcc will not support this ops.

A test-and-set lock is only useful as a bad example:

http://en.wikipedia.org/wiki/Test_and_Test-and-set

>> This leads to the following question: What is the RTEMS (!) minimum requirement for SMP support?
>>
>> I think an architecture must support a compare and swap instruction or the load linked and store conditional model.  We should make it clear that a simple atomic swap is not enough to support SMP.
>>
>> Under this requirement we can remove the atomic flag from the RTEMS API.
>>
>> --
>> Sebastian Huber, embedded brains GmbH
>>
>> Address : Dornierstr. 4, D-82178 Puchheim, Germany
>> Phone   : +49 89 189 47 41-16
>> Fax     : +49 89 189 47 41-09
>> E-Mail  : sebastian.huber at embedded-brains.de
>> PGP     : Public key available on request.
>>
>> Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
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>


-- 
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax     : +49 89 189 47 41-09
E-Mail  : sebastian.huber at embedded-brains.de
PGP     : Public key available on request.

Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.



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