[PATCH] Add raspberry pi board BSP
Cudmore, Alan P. (GSFC-5820)
alan.p.cudmore at nasa.gov
Mon Feb 25 01:41:23 UTC 2013
This patch is my Raspberry Pi BSP.
- Based on the lpc32xx BSP ( no libcpu ). I removed the MMU setup code, it could probably be added back in
- Interrupt driven console code is included, but does not work yet. The polled driver works.
- The benchmark timer driver does not work yet, I was trying to troubleshoot that this weekend.
- It was compiled and tested with the rtems-4.11 ( non-eabi ) toolchain.
Alan
---------------
diff --git a/c/src/lib/libbsp/arm/acinclude.m4 b/c/src/lib/libbsp/arm/acinclude.m4
index 9512b26..82aba6f 100644
--- a/c/src/lib/libbsp/arm/acinclude.m4
+++ b/c/src/lib/libbsp/arm/acinclude.m4
@@ -24,6 +24,8 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR],
AC_CONFIG_SUBDIRS([lpc32xx]);;
nds )
AC_CONFIG_SUBDIRS([nds]);;
+ raspberry_pi )
+ AC_CONFIG_SUBDIRS([raspberry_pi]);;
rtl22xx )
AC_CONFIG_SUBDIRS([rtl22xx]);;
smdk2410 )
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/ChangeLog b/c/src/lib/libbsp/arm/raspberry_pi/ChangeLog
new file mode 100755
index 0000000..3b85dbb
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/ChangeLog
@@ -0,0 +1,4 @@
+2013-02-15 Alan Cudmores <alan.cudmore at gmail.com>
+
+ * created raspberry_pi bsp from lpc32xx
+
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/Makefile.am b/c/src/lib/libbsp/arm/raspberry_pi/Makefile.am
new file mode 100755
index 0000000..f19ad95
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/Makefile.am
@@ -0,0 +1,151 @@
+##
+#
+# @file
+#
+# @brief Makefile of LibBSP for the raspberry_pi board.
+#
+
+# $Id: Makefile.am,v 1.5 2010/05/20 13:15:35 sh Exp $
+
+ACLOCAL_AMFLAGS = -I ../../../../aclocal
+
+include $(top_srcdir)/../../../../automake/compile.am
+
+include_bspdir = $(includedir)/bsp
+include_libcpudir = $(includedir)/libcpu
+
+dist_project_lib_DATA = bsp_specs
+
+###############################################################################
+# Header #
+###############################################################################
+
+include_HEADERS = include/bsp.h
+include_HEADERS += ../../shared/include/tm27.h
+
+nodist_include_HEADERS = ../../shared/include/coverhd.h \
+ include/bspopts.h
+
+nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h
+
+include_bsp_HEADERS =
+include_bsp_HEADERS += ../../shared/include/utility.h
+include_bsp_HEADERS += ../../shared/include/irq-generic.h
+include_bsp_HEADERS += ../../shared/include/irq-info.h
+include_bsp_HEADERS += ../../shared/include/stackalloc.h
+include_bsp_HEADERS += ../../shared/include/uart-output-char.h
+include_bsp_HEADERS += ../../shared/tod.h
+include_bsp_HEADERS += ../shared/include/linker-symbols.h
+include_bsp_HEADERS += ../shared/include/start.h
+include_bsp_HEADERS += ../shared/lpc/include/lpc-timer.h
+include_bsp_HEADERS += ../shared/lpc/include/lpc-dma.h
+include_bsp_HEADERS += include/irq.h
+include_bsp_HEADERS += include/mmu.h
+include_bsp_HEADERS += include/raspberry_pi.h
+
+include_libcpu_HEADERS = ../../../libcpu/arm/shared/include/cache_.h \
+ ../../../libcpu/arm/shared/include/arm-cp15.h
+
+###############################################################################
+# Data #
+###############################################################################
+
+noinst_LIBRARIES = libbspstart.a
+
+libbspstart_a_SOURCES = ../shared/start/start.S
+
+project_lib_DATA = start.$(OBJEXT)
+
+project_lib_DATA += startup/linkcmds
+project_lib_DATA += ../shared/startup/linkcmds.base
+
+EXTRA_DIST = startup/linkcmds
+
+###############################################################################
+# LibBSP #
+###############################################################################
+
+noinst_LIBRARIES += libbsp.a
+
+libbsp_a_SOURCES =
+libbsp_a_CPPFLAGS =
+libbsp_a_LIBADD =
+
+# Shared
+libbsp_a_SOURCES += ../../shared/bootcard.c
+libbsp_a_SOURCES += ../../shared/bspclean.c
+libbsp_a_SOURCES += ../../shared/bspgetworkarea.c
+libbsp_a_SOURCES += ../../shared/bsplibc.c
+libbsp_a_SOURCES += ../../shared/bsppost.c
+libbsp_a_SOURCES += ../../shared/bsppredriverhook.c
+libbsp_a_SOURCES += ../../shared/bsppretaskinghook.c
+libbsp_a_SOURCES += ../../shared/gnatinstallhandler.c
+libbsp_a_SOURCES += ../../shared/sbrk.c
+libbsp_a_SOURCES += ../../shared/src/stackalloc.c
+libbsp_a_SOURCES += ../shared/abort/simple_abort.c
+libbsp_a_SOURCES += ../shared/startup/bsp-start-memcpy.S
+
+# libbsp_a_SOURCES += ../../shared/src/uart-output-char.c
+
+
+# Startup
+libbsp_a_SOURCES += startup/bspreset.c
+libbsp_a_SOURCES += startup/bspstart.c
+
+# IRQ
+libbsp_a_SOURCES += ../../shared/src/irq-default-handler.c
+libbsp_a_SOURCES += ../../shared/src/irq-generic.c
+libbsp_a_SOURCES += ../../shared/src/irq-info.c
+libbsp_a_SOURCES += ../../shared/src/irq-legacy.c
+libbsp_a_SOURCES += ../../shared/src/irq-server.c
+libbsp_a_SOURCES += ../../shared/src/irq-shell.c
+libbsp_a_SOURCES += irq/irq.c
+
+# Console
+libbsp_a_SOURCES += console/console.c
+
+# clock
+libbsp_a_SOURCES += clock/clockdrv.c ../../../shared/clockdrv_shell.h
+
+# Timer
+libbsp_a_SOURCES += misc/timer.c
+
+# RTC
+
+# SSP
+
+# I2C
+
+# Cache
+libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
+libbsp_a_SOURCES += ../../../libcpu/arm/shared/include/cache_.h
+libbsp_a_CPPFLAGS += -I$(srcdir)/../../../libcpu/arm/shared/include
+
+# Start hooks
+libbsp_a_SOURCES += startup/bspstarthooks.c
+
+###############################################################################
+# Network #
+###############################################################################
+
+#if HAS_NETWORKING
+#
+#noinst_PROGRAMS = network.rel
+#
+#network_rel_SOURCES = ../shared/lpc/network/lpc-ethernet.c
+#network_rel_CPPFLAGS = $(AM_CPPFLAGS) -D__INSIDE_RTEMS_BSD_TCPIP_STACK__ -D__BSD_VISIBLE
+#network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+#
+#
+#libbsp_a_LIBADD += network.rel
+#
+#endif
+
+###############################################################################
+# Special Rules #
+###############################################################################
+
+DISTCLEANFILES = include/bspopts.h
+
+include $(srcdir)/preinstall.am
+include $(top_srcdir)/../../../../automake/local.am
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/README b/c/src/lib/libbsp/arm/raspberry_pi/README
new file mode 100755
index 0000000..7c92d55
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/README
@@ -0,0 +1,65 @@
+BSP for the Raspberry Pi ARM board
+This is a basic port that should work on either Model A or Model B.
+
+It currently supports the following devices:
+ o Console using the PL011 UART0
+ The console driver only works with polled mode right now,
+ the interrupt code is there, but it does not work yet.
+ The console driver is currently hardcoded at 115k 8N1
+ o Clock uses the internal ARM timer
+ The Raspberry Pi can be overclocked through the config.txt file, this
+ would affect the duration of the clock tick.
+ o Benchmark timer reads the lower 32 bit GPU timer register
+
+To run an RTEMS binary, it must be stripped and loaded on the SD card along with
+the following files:
+ bootcode.bin
+ config.txt
+ loader.bin
+ start.elf
+ kernel.img ( the RTEMS binary, you can change the name in config.txt )
+
+These files can be obtained from a Linux installation image, or from here:
+https://github.com/raspberrypi/firmware
+
+I used an old 256MB SD card to boot RTEMS.
+Much more information about the SD card file and bootloader can be found here:
+http://elinux.org/RPi_Hub
+http://www.raspberrypi.org
+
+The linker script is set up for 128MB, so it can be used with a GPU/ARM split
+of 128/128.
+The bootloader that is used on the SD card determines the split of RAM between the
+ARM and the GPU. It might make sense to adjust the GPU/ARM memory split to give
+more memory to RTEMS, especially on a 512MB board.
+
+To do:
+ It would be nice to get support in the BSP for the following:
+ o SD card
+ o USB and USB 10/100 network chip on Model B
+ o SPI
+ o GPIO
+ o ARM MMU
+ o Graphics console
+ o Sound
+
+Credits and links:
+
+ There is a wealth of code and information to reference on the raspberrypi.org bare metal forums:
+ http://www.raspberrypi.org/phpBB3/viewforum.php?f=72
+
+ I found information about how to program the timers, interrupts, and UART 0
+ from the examples provided by:
+
+ David Welch:
+ https://github.com/dwelch67/raspberrypi
+ The readme file at his github repository has valuable information about connecting a UART cable, JTAG etc.
+
+ Steve Bate:
+ http://www.stevebate.net/chibios-rpi/GettingStarted.html
+ Steve provided a port of the Chibios RTOS to the raspberry Pi
+
+ James Walmsley:
+ http://www.raspberrypi.org/phpBB3/viewtopic.php?f=72&t=22423
+ James ported FreeRTOS to the raspberry Pi.
+
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/bsp_specs b/c/src/lib/libbsp/arm/raspberry_pi/bsp_specs
new file mode 100755
index 0000000..082653a
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/bsp_specs
@@ -0,0 +1,13 @@
+%rename endfile old_endfile
+%rename startfile old_startfile
+%rename link old_link
+
+*startfile:
+%{!qrtems: %(old_startfile)} \
+%{!nostdlib: %{qrtems: start.o%s crti.o%s crtbegin.o%s -e _start}}
+
+*link:
+%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N}
+
+*endfile:
+%{!qrtems: *(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s }
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/clock/clockdrv.c b/c/src/lib/libbsp/arm/raspberry_pi/clock/clockdrv.c
new file mode 100755
index 0000000..63017fb
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/clock/clockdrv.c
@@ -0,0 +1,97 @@
+/*
+ * BCM2835 Clock driver
+ *
+ * Copyright (c) 2002 by Jay Monkman <jtm at smoothsmoothie.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ *
+ * http://www.rtems.com/license/LICENSE.
+ *
+ *
+ * $Id: clockdrv.c,v 1.13 2010/04/30 14:48:52 sh Exp $
+*/
+
+#include <rtems.h>
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <bsp/irq-generic.h>
+#include <bsp/raspberry_pi.h>
+
+#define CLOCK_VECTOR 0
+
+void Clock_isr(rtems_irq_hdl_param arg);
+static void clock_isr_on(const rtems_irq_connect_data *unused);
+static void clock_isr_off(const rtems_irq_connect_data *unused);
+static int clock_isr_is_on(const rtems_irq_connect_data *irq);
+uint32_t clock_driver_get_nanoseconds_since_last_tick(void);
+
+rtems_irq_connect_data clock_isr_data =
+{
+ BCM2835_IRQ_ID_TIMER_0 ,
+ (rtems_irq_hdl)Clock_isr,
+ NULL,
+ clock_isr_on,
+ clock_isr_off,
+ clock_isr_is_on
+};
+
+#define Clock_driver_support_at_tick() \
+ do { \
+ BCM2835_REG(BCM2835_TIMER_CLI) = 0; \
+ } while(0)
+
+#define Clock_driver_support_install_isr( _new, _old ) \
+ do { \
+ (_old) = NULL; /* avoid warning */; \
+ BSP_install_rtems_irq_handler(&clock_isr_data); \
+ } while(0)
+
+/*
+ * Set up the clock hardware
+ */
+
+#define Clock_driver_support_initialize_hardware() \
+ do { \
+ BCM2835_REG(BCM2835_TIMER_CTL) = 0x003E0000; \
+ BCM2835_REG(BCM2835_TIMER_LOD) = 10000 - 1; \
+ BCM2835_REG(BCM2835_TIMER_RLD) = 10000 - 1; \
+ BCM2835_REG(BCM2835_TIMER_DIV) = BCM2835_TIMER_PRESCALE; \
+ BCM2835_REG(BCM2835_TIMER_CLI) = 0; \
+ BCM2835_REG(BCM2835_TIMER_CTL) = 0x003E00A2; \
+ } while (0)
+
+#define Clock_driver_support_shutdown_hardware() \
+ do { \
+ BSP_remove_rtems_irq_handler(&clock_isr_data); \
+ } while (0)
+
+/*
+ * Return the nanoseconds since last tick
+ */
+uint32_t clock_driver_get_nanoseconds_since_last_tick(void)
+{
+ return 0;
+}
+
+#define Clock_driver_nanoseconds_since_last_tick \
+ clock_driver_get_nanoseconds_since_last_tick
+
+static void clock_isr_on(const rtems_irq_connect_data *unused)
+{
+ bsp_interrupt_vector_enable(BCM2835_IRQ_ID_TIMER_0);
+ return;
+}
+
+static void clock_isr_off(const rtems_irq_connect_data *unused)
+{
+ bsp_interrupt_vector_disable(BCM2835_IRQ_ID_TIMER_0);
+ return;
+}
+
+static int clock_isr_is_on(const rtems_irq_connect_data *irq)
+{
+ return 1;
+}
+
+#include "../../../shared/clockdrv_shell.h"
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/configure.ac b/c/src/lib/libbsp/arm/raspberry_pi/configure.ac
new file mode 100755
index 0000000..cfb1918
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/configure.ac
@@ -0,0 +1,31 @@
+##
+#
+# @file
+#
+# @brief Configure script of LibBSP for the Raspberry Pi boards.
+#
+
+AC_PREREQ([2.68])
+AC_INIT([rtems-c-src-lib-libbsp-arm-raspberry_pi],[_RTEMS_VERSION],[rtems-bugs at rtems.com])
+AC_CONFIG_SRCDIR([bsp_specs])
+RTEMS_TOP(../../../../../..)
+
+RTEMS_CANONICAL_TARGET_CPU
+AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.11.1])
+RTEMS_BSP_CONFIGURE
+
+RTEMS_PROG_CC_FOR_TARGET
+RTEMS_CANONICALIZE_TOOLS
+RTEMS_PROG_CCAS
+
+RTEMS_CHECK_NETWORKING
+AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
+
+RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[])
+RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start])
+
+RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
+RTEMS_BSP_LINKCMDS
+
+AC_CONFIG_FILES([Makefile])
+AC_OUTPUT
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/console/console.c b/c/src/lib/libbsp/arm/raspberry_pi/console/console.c
new file mode 100755
index 0000000..5156737
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/console/console.c
@@ -0,0 +1,457 @@
+/*
+ * Console driver for the Raspberry Pi PL011 UART0
+ *
+ * Based on a driver by Jay Monkman <jtm at lopingdog.com>
+ * Copyright (c) 2005 by Loping Dog Embedded Systems
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license
+ *
+ * $Id: uart.c,v 1.9 2010/04/30 14:40:16 sh Exp $
+ */
+#include <bsp.h>
+#include <rtems/libio.h>
+#include <libchip/sersupp.h>
+#include <rtems/error.h>
+#include <rtems/bspIo.h>
+#include <termios.h>
+#include <rtems/irq.h>
+#include <bsp/irq.h>
+#include <bsp/irq-generic.h>
+#include <bsp/raspberry_pi.h>
+#include <bsp/uart-output-char.h>
+
+/* Define this to use interrupt driver UART driver */
+/* Note: The interrupt driver does not currently work */
+/* #define USE_INTERRUPTS 1 */
+#undef USE_INTERRUPTS
+
+#define poll_write(c) uart0_poll_write_char(0, c)
+#define poll_read() uart0_poll_read_char(0)
+
+int _BSP_poll_char(void);
+void _BSP_output_char(char c);
+int uart0_poll_read_char(int minor);
+void uart0_poll_write_char(int minor, char c);
+
+static int uart0_first_open(int, int, void *);
+static int uart0_last_close(int, int, void *);
+static int uart0_poll_read(int);
+static int uart0_set_attrs(int, const struct termios *);
+static void uart0_init(int minor);
+static void uart0_set_baud(int, int);
+static ssize_t uart0_poll_write(int, const char *, size_t);
+
+#if defined(USE_INTERRUPTS)
+static void uart0_isr(rtems_irq_hdl_param);
+static void uart0_isr_on(const rtems_irq_connect_data *irq);
+static void uart0_isr_off(const rtems_irq_connect_data *irq);
+static int uart0_isr_is_on(const rtems_irq_connect_data *irq);
+static ssize_t uart0_intr_write(int, const char *, size_t);
+#endif
+
+/* TERMIOS callbacks */
+#if defined(USE_INTERRUPTS)
+rtems_termios_callbacks uart0_cbacks =
+{
+ .firstOpen = uart0_first_open,
+ .lastClose = uart0_last_close,
+ .pollRead = NULL,
+ .write = uart0_intr_write,
+ .setAttributes = uart0_set_attrs,
+ .stopRemoteTx = NULL,
+ .startRemoteTx = NULL,
+ .outputUsesInterrupts = 1,
+};
+#else
+rtems_termios_callbacks uart0_cbacks =
+{
+ .firstOpen = uart0_first_open,
+ .lastClose = uart0_last_close,
+ .pollRead = uart0_poll_read,
+ .write = uart0_poll_write,
+ .setAttributes = uart0_set_attrs,
+ .stopRemoteTx = NULL,
+ .startRemoteTx = NULL,
+ .outputUsesInterrupts = 0,
+};
+#endif
+
+#if defined(USE_INTERRUPTS)
+static rtems_irq_connect_data uart0_isr_data;
+#endif
+
+typedef struct
+{
+ int minor;
+ volatile const char * buf;
+ volatile int len;
+ volatile int idx;
+ void * tty;
+
+} uart0_data_t;
+
+static uart0_data_t uart0_data;
+
+static void uart0_delay(uint32_t n)
+{
+ volatile uint32_t i = 0;
+ for(i = 0; i < n; i++);
+}
+
+rtems_device_driver console_initialize(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void *arg
+)
+{
+ rtems_status_code status;
+
+ uart0_init(0);
+
+ rtems_termios_initialize();
+
+ /* /dev/console and /dev/tty0 are the same */
+ status = rtems_io_register_name("/dev/console", major, 0);
+ if (status != RTEMS_SUCCESSFUL)
+ {
+ rtems_panic("%s:%d Error registering /dev/console :: %d\n",
+ __FUNCTION__, __LINE__, status);
+ }
+
+ status = rtems_io_register_name("/dev/tty0", major, 0);
+ if (status != RTEMS_SUCCESSFUL)
+ {
+ rtems_panic("%s:%d Error registering /dev/tty0 :: %d\n",
+ __FUNCTION__, __LINE__, status);
+ }
+ return RTEMS_SUCCESSFUL;
+}
+
+rtems_device_driver console_open(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void * arg
+)
+{
+ rtems_status_code rc;
+
+ if (minor > 0)
+ {
+ return RTEMS_INVALID_NUMBER;
+ }
+
+ rc = rtems_termios_open(major, minor, arg, &uart0_cbacks);
+
+ return rc;
+}
+
+rtems_device_driver console_close(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void * arg
+)
+{
+ return rtems_termios_close(arg);
+}
+
+rtems_device_driver console_read(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void * arg
+)
+{
+ return rtems_termios_read(arg);
+}
+
+rtems_device_driver console_write(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void * arg
+)
+{
+ return rtems_termios_write(arg);
+}
+
+rtems_device_driver console_control(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void * arg
+)
+{
+ return rtems_termios_ioctl(arg);
+}
+
+static void uart0_init(int minor)
+{
+ unsigned int gpio_reg;
+
+ uart0_data.minor = minor;
+ uart0_data.buf = NULL;
+ uart0_data.len = 0;
+ uart0_data.idx = 0;
+
+#if defined(USE_INTERRUPTS)
+ uart0_isr_data.name = BCM2835_IRQ_ID_UART;
+ uart0_isr_data.hdl = uart0_isr;
+ uart0_isr_data.handle = &uart0_data;
+ uart0_isr_data.on = uart0_isr_on;
+ uart0_isr_data.off = uart0_isr_off;
+ uart0_isr_data.isOn = uart0_isr_is_on;
+#endif
+
+ /*
+ ** Program GPIO pins for UART 0
+ */
+ gpio_reg = BCM2835_REG(BCM2835_GPIO_GPFSEL1);
+ gpio_reg &= ~(7<<12); /* gpio14 */
+ gpio_reg |= (4<<12); /* alt0 */
+ gpio_reg &= ~(7<<15); /* gpio15 */
+ gpio_reg |= (4<<15); /* alt0 */
+ BCM2835_REG(BCM2835_GPIO_GPFSEL1) = gpio_reg;
+
+ BCM2835_REG(BCM2835_GPIO_GPPUD) = 0;
+ uart0_delay(150);
+ BCM2835_REG(BCM2835_GPIO_GPPUDCLK0) = (1<<14)|(1<<15);
+ uart0_delay(150);
+ BCM2835_REG(BCM2835_GPIO_GPPUDCLK0) = 0;
+
+ /*
+ ** Init the PL011 UART
+ */
+ BCM2835_REG(BCM2835_UART0_CR) = 0;
+ BCM2835_REG(BCM2835_UART0_ICR) = 0x7FF;
+ BCM2835_REG(BCM2835_UART0_IMSC) = 0;
+ BCM2835_REG(BCM2835_UART0_IBRD) = 1;
+ BCM2835_REG(BCM2835_UART0_FBRD) = 40;
+ BCM2835_REG(BCM2835_UART0_LCRH) = 0x70;
+ BCM2835_REG(BCM2835_UART0_RSRECR) = 0;
+
+ BCM2835_REG(BCM2835_UART0_CR) = 0x301;
+
+ BCM2835_REG(BCM2835_UART0_IMSC) = BCM2835_UART0_IMSC_RX;
+
+ uart0_set_baud(0, 115000);
+}
+
+
+static int uart0_first_open(int major, int minor, void *arg)
+{
+ rtems_libio_open_close_args_t *args = arg;
+
+ uart0_data.tty = args->iop->data1;
+
+#if defined(USE_INTERRUPTS)
+ BSP_install_rtems_irq_handler(&uart0_isr_data);
+ BCM2835_REG(BCM2835_UART0_IMSC) = BCM2835_UART0_IMSC_RX;
+#endif
+ return 0;
+}
+
+static int uart0_last_close(int major, int minor, void *arg)
+{
+#if defined(USE_INTERRUPTS)
+ BCM2835_REG(BCM2835_UART0_IMSC) = 0;
+ BSP_remove_rtems_irq_handler(&uart0_isr_data);
+#endif
+ return 0;
+}
+
+static int uart0_poll_read(int minor)
+{
+ if (minor == 0)
+ {
+ if(((BCM2835_REG(BCM2835_UART0_FR)) & BCM2835_UART0_FR_RXFE) == 0)
+ {
+ return((BCM2835_REG(BCM2835_UART0_DR)) & 0xFF );
+ }
+ else
+ {
+ return -1;
+ }
+ }
+ else
+ {
+ printk("Unknown console minor number: %d\n", minor);
+ return -1;
+ }
+}
+
+static ssize_t uart0_poll_write(int minor, const char *buf, size_t len)
+{
+ int i;
+
+ if (minor == 0)
+ {
+ for (i = 0; i < len; i++)
+ {
+ while (1)
+ {
+ if ((BCM2835_REG(BCM2835_UART0_FR) & BCM2835_UART0_FR_TXFF) == 0) break;
+ }
+ BCM2835_REG(BCM2835_UART0_DR) = buf[i];
+ }
+ }
+ else
+ {
+ printk("Unknown console minor number: %d\n", minor);
+ return -1;
+ }
+ return 1;
+}
+
+/* This is for setting baud rate, bits, etc. */
+static int uart0_set_attrs(int minor, const struct termios *t)
+{
+ int baud;
+
+ baud = rtems_termios_baud_to_number(t->c_cflag & CBAUD);
+ uart0_set_baud(minor, baud);
+
+ return 0;
+}
+
+#if defined(USE_INTERRUPTS)
+static ssize_t uart0_intr_write(int minor, const char *buf, size_t len)
+{
+ uart0_data.buf = buf;
+ uart0_data.len = len;
+ uart0_data.idx = 0;
+
+ /* Enable transmit interrupt */
+ BCM2835_REG(BCM2835_UART0_IMSC) = BCM2835_UART0_IMSC_TX | BCM2835_UART0_IMSC_RX;
+
+ return 1;
+}
+
+
+static void uart0_isr_on(const rtems_irq_connect_data *irq)
+{
+ bsp_interrupt_vector_enable(BCM2835_IRQ_ID_UART);
+}
+
+static void uart0_isr_off(const rtems_irq_connect_data *irq)
+{
+ bsp_interrupt_vector_disable(BCM2835_IRQ_ID_UART);
+}
+
+static int uart0_isr_is_on(const rtems_irq_connect_data *irq)
+{
+ /* TODO: Need a function in irq.c to return interrupt state */
+ return(1);
+}
+
+/*
+** Handle both the receive and transmit interrupts
+*/
+static void uart0_isr(rtems_irq_hdl_param param)
+{
+ uart0_data_t *uart_data = param;
+ char buf[32];
+ int i=0;
+ int len;
+
+ /*
+ ** Process receive interrupt
+ */
+ if (BCM2835_REG(BCM2835_UART0_MIS) & BCM2835_UART0_MIS_RX)
+ {
+ while(((BCM2835_REG(BCM2835_UART0_FR)) & BCM2835_UART0_FR_RXFE) == 0)
+ {
+ buf[i] = BCM2835_REG(BCM2835_UART0_DR) & 0xFF;
+ i++;
+ }
+ /* Clear RX Interrupt */
+ BCM2835_REG(BCM2835_UART0_ICR) = BCM2835_UART0_ICR_RX;
+
+ rtems_termios_enqueue_raw_characters(uart_data->tty, buf, i);
+
+ }
+
+ /*
+ ** Process transmit interrupt
+ while ( (((uart_data->regs->aux_mu_lsr_reg) & 0x20) == 0x01) &&
+ */
+
+ if (BCM2835_REG(BCM2835_UART0_MIS) & BCM2835_UART0_MIS_TX)
+ {
+ if (uart_data->idx < uart_data->len)
+ {
+ while ((BCM2835_REG(BCM2835_UART0_FR) & BCM2835_UART0_FR_TXFF) &&
+ (uart_data->idx < uart_data->len))
+ {
+ BCM2835_REG(BCM2835_UART0_DR) = uart_data->buf[uart_data->idx];
+ uart_data->idx++;
+ }
+
+ /* Clear TX Interrupt */
+ BCM2835_REG(BCM2835_UART0_ICR) = BCM2835_UART0_ICR_TX;
+
+ }
+ }
+ else
+ {
+ len = uart_data->len;
+ uart_data->len = 0;
+
+ /* Clear TX Interrupt */
+ BCM2835_REG(BCM2835_UART0_ICR) = BCM2835_UART0_ICR_TX;
+
+ /* Disable TX Interrupt, leaving RX enabled */
+ BCM2835_REG(BCM2835_UART0_IMSC) = BCM2835_UART0_IMSC_RX;
+ rtems_termios_dequeue_characters(uart_data->tty, len);
+
+ }
+
+}
+
+#endif
+
+static void uart0_set_baud(int minor, int baud)
+{
+ /*
+ ** Nothing for now
+ ** just keep it at 115k
+ */
+ return;
+}
+
+/*
+ * Polled, non-blocking read from UART
+ */
+int uart0_poll_read_char(int minor)
+{
+ return uart0_poll_read(minor);
+}
+
+/*
+ * Polled, blocking write from UART
+ */
+void uart0_poll_write_char(int minor, char c)
+{
+ uart0_poll_write(minor, &c, 1);
+}
+
+/*
+ * Functions for printk() and friends.
+ */
+void _BSP_output_char(char c)
+{
+ poll_write(c);
+ if (c == '\n')
+ {
+ poll_write('\r');
+ }
+}
+
+BSP_output_char_function_type BSP_output_char = _BSP_output_char;
+
+int _BSP_poll_char(void)
+{
+ return poll_read();
+}
+
+BSP_polling_getchar_function_type BSP_poll_char = _BSP_poll_char;
+
+
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/include/bsp.h b/c/src/lib/libbsp/arm/raspberry_pi/include/bsp.h
new file mode 100755
index 0000000..c83cfe9
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/include/bsp.h
@@ -0,0 +1,44 @@
+/**
+ * @file
+ *
+ * @ingroup raspberry_pi
+ *
+ * @brief Global BSP definitions.
+ */
+
+/*
+ * Copyright (c) 2009
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_RASPBERRY_PI_BSP_H
+#define LIBBSP_ARM_RASPBERRY_PI_BSP_H
+
+#include <bspopts.h>
+
+#include <rtems.h>
+#include <rtems/console.h>
+#include <rtems/clockdrv.h>
+
+#include <bsp/raspberry_pi.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#define BSP_FEATURE_IRQ_EXTENSION
+
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_RASPBERRY_PI_BSP_H */
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/include/irq.h b/c/src/lib/libbsp/arm/raspberry_pi/include/irq.h
new file mode 100755
index 0000000..e7ad1e4
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/include/irq.h
@@ -0,0 +1,72 @@
+/**
+ * @file
+ *
+ * @ingroup bsp_interrupt
+ *
+ * @brief Interrupt definitions.
+ */
+
+/*
+ * Copyright (c) 2009
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_RASBPERRY_PI_IRQ_H
+#define LIBBSP_ARM_RASPBERRY_PI_IRQ_H
+
+#ifndef ASM
+
+#include <rtems.h>
+#include <rtems/irq.h>
+#include <rtems/irq-extension.h>
+
+/**
+ * @addtogroup bsp_interrupt
+ *
+ * @{
+ */
+#define BCM2835_INTC_TOTAL_IRQ 64 + 8
+
+
+#define BCM2835_IRQ_ID_AUX 29
+#define BCM2835_IRQ_ID_SPI_SLAVE 43
+#define BCM2835_IRQ_ID_PWA0 45
+#define BCM2835_IRQ_ID_PWA1 46
+#define BCM2835_IRQ_ID_SMI 48
+#define BCM2835_IRQ_ID_GPIO_0 49
+#define BCM2835_IRQ_ID_GPIO_1 50
+#define BCM2835_IRQ_ID_GPIO_2 51
+#define BCM2835_IRQ_ID_GPIO_3 52
+#define BCM2835_IRQ_ID_I2C 53
+#define BCM2835_IRQ_ID_SPI 54
+#define BCM2835_IRQ_ID_PCM 55
+#define BCM2835_IRQ_ID_UART 57
+
+
+#define BCM2835_IRQ_ID_TIMER_0 64
+#define BCM2835_IRQ_ID_MAILBOX_0 65
+#define BCM2835_IRQ_ID_DOORBELL_0 66
+#define BCM2835_IRQ_ID_DOORBELL_1 67
+#define BCM2835_IRQ_ID_GPU0_HALTED 68
+
+#define BSP_INTERRUPT_VECTOR_MIN (0)
+#define BSP_INTERRUPT_VECTOR_MAX (BCM2835_INTC_TOTAL_IRQ - 1)
+
+#define BSP_IRQ_COUNT (BCM2835_INTC_TOTAL_IRQ)
+
+
+void raspberry_pi_set_exception_handler(Arm_symbolic_exception_name exception,
+ void (*handler)(void));
+
+/** @} */
+
+#endif /* ASM */
+#endif /* LIBBSP_ARM_RASPBERRY_PI_IRQ_H */
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/include/mmu.h b/c/src/lib/libbsp/arm/raspberry_pi/include/mmu.h
new file mode 100755
index 0000000..8b50bd2
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/include/mmu.h
@@ -0,0 +1,64 @@
+/**
+ * @file
+ *
+ * @ingroup lpc32xx_mmu
+ *
+ * @brief MMU API.
+ */
+
+/*
+ * Copyright (c) 2009
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_RASPBERRY_PI_MMU_H
+#define LIBBSP_ARM_RASPBERRY_PI_MMU_H
+
+#include <libcpu/arm-cp15.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/**
+ * @defgroup raspberry_pi_mmu MMU Support
+ *
+ * @ingroup raspberry_pi
+ *
+ * @brief MMU support.
+ *
+ * @{
+ */
+
+#define RASPBERRY_PI_MMU_CLIENT_DOMAIN 15U
+
+#define RASPBERRY_PI_MMU_READ_ONLY \
+ ((RASPBERRY_PI_MMU_CLIENT_DOMAIN << ARM_MMU_SECT_DOMAIN_SHIFT) \
+ | ARM_MMU_SECT_DEFAULT)
+
+#define RASPBERRY_PI_MMU_READ_ONLY_CACHED \
+ (RASPBERRY_PI_MMU_READ_ONLY | ARM_MMU_SECT_C | ARM_MMU_SECT_B)
+
+#define RASPBERRY_PI_MMU_READ_WRITE \
+ ((RASPBERRY_PI_MMU_CLIENT_DOMAIN << ARM_MMU_SECT_DOMAIN_SHIFT) \
+ | ARM_MMU_SECT_AP_0 \
+ | ARM_MMU_SECT_DEFAULT)
+
+#define RASPBERRY_PI_MMU_READ_WRITE_CACHED \
+ (RASPBERRY_PI_MMU_READ_WRITE | ARM_MMU_SECT_C | ARM_MMU_SECT_B)
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_RASPBERRY_PI_MMU_H */
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/include/raspberry_pi.h b/c/src/lib/libbsp/arm/raspberry_pi/include/raspberry_pi.h
new file mode 100755
index 0000000..ed914e4
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/include/raspberry_pi.h
@@ -0,0 +1,186 @@
+
+/*
+ * raspberry_pi.h
+ *
+ * Alan Cudmore
+ * alan.cudmore at gmail.com
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http:
+ */
+
+#ifndef LIBBSP_ARM_RASPBERRY_PI_RASPBERRY_PI_H
+#define LIBBSP_ARM_RASPBERRY_PI_RASPBERRY_PI_H
+
+#include <stdint.h>
+#include <bsp/utility.h>
+
+/**
+ * @defgroup raspberry_pi_reg Register Definitions
+ *
+ * @ingroup raspberry_pi
+ *
+ * @brief Register definitions.
+ *
+ * @{
+ */
+
+#define BCM2835_REG(x) (*(volatile uint32_t *)(x))
+#define BCM2835_BIT(n) (1 << (n))
+#define BCM2835_CLOCK_FREQ 250000000
+
+/**
+ * @name Internal ARM Timer Registers
+ *
+ * @{
+ */
+
+#define BCM2835_TIMER_BASE (0x2000B400)
+
+#define BCM2835_TIMER_LOD (BCM2835_TIMER_BASE+0x00)
+#define BCM2835_TIMER_VAL (BCM2835_TIMER_BASE+0x04)
+#define BCM2835_TIMER_CTL (BCM2835_TIMER_BASE+0x08)
+#define BCM2835_TIMER_CLI (BCM2835_TIMER_BASE+0x0C)
+#define BCM2835_TIMER_RIS (BCM2835_TIMER_BASE+0x10)
+#define BCM2835_TIMER_MIS (BCM2835_TIMER_BASE+0x14)
+#define BCM2835_TIMER_RLD (BCM2835_TIMER_BASE+0x18)
+#define BCM2835_TIMER_DIV (BCM2835_TIMER_BASE+0x1C)
+#define BCM2835_TIMER_CNT (BCM2835_TIMER_BASE+0x20)
+
+
+#define BCM2835_TIMER_PRESCALE 0xF9
+
+/** @} */
+
+
+/**
+ * @name GPIO Registers
+ *
+ * @{
+ */
+
+#define BCM2835_GPIO_REGS_BASE (0x20200000)
+
+#define BCM2835_GPIO_GPFSEL1 (BCM2835_GPIO_REGS_BASE+0x04)
+#define BCM2835_GPIO_GPSET0 (BCM2835_GPIO_REGS_BASE+0x1C)
+#define BCM2835_GPIO_GPCLR0 (BCM2835_GPIO_REGS_BASE+0x28)
+#define BCM2835_GPIO_GPPUD (BCM2835_GPIO_REGS_BASE+0x94)
+#define BCM2835_GPIO_GPPUDCLK0 (BCM2835_GPIO_REGS_BASE+0x98)
+
+/** @} */
+
+/**
+ * @name AUX Registers
+ *
+ * @{
+ */
+
+#define BCM2835_AUX_BASE (0x20215000)
+
+#define AUX_ENABLES (BCM2835_AUX_BASE+0x04)
+#define AUX_MU_IO_REG (BCM2835_AUX_BASE+0x40)
+#define AUX_MU_IER_REG (BCM2835_AUX_BASE+0x44)
+#define AUX_MU_IIR_REG (BCM2835_AUX_BASE+0x48)
+#define AUX_MU_LCR_REG (BCM2835_AUX_BASE+0x4C)
+#define AUX_MU_MCR_REG (BCM2835_AUX_BASE+0x50)
+#define AUX_MU_LSR_REG (BCM2835_AUX_BASE+0x54)
+#define AUX_MU_MSR_REG (BCM2835_AUX_BASE+0x58)
+#define AUX_MU_SCRATCH (BCM2835_AUX_BASE+0x5C)
+#define AUX_MU_CNTL_REG (BCM2835_AUX_BASE+0x60)
+#define AUX_MU_STAT_REG (BCM2835_AUX_BASE+0x64)
+#define AUX_MU_BAUD_REG (BCM2835_AUX_BASE+0x68)
+
+/** @} */
+
+
+/**
+ * @name UART 0 (PL011) Registers
+ *
+ * @{
+ */
+
+
+#define BCM2835_UART0_BASE (0x20201000)
+
+#define BCM2835_UART0_DR (BCM2835_UART0_BASE+0x00)
+#define BCM2835_UART0_RSRECR (BCM2835_UART0_BASE+0x04)
+#define BCM2835_UART0_FR (BCM2835_UART0_BASE+0x18)
+#define BCM2835_UART0_ILPR (BCM2835_UART0_BASE+0x20)
+#define BCM2835_UART0_IBRD (BCM2835_UART0_BASE+0x24)
+#define BCM2835_UART0_FBRD (BCM2835_UART0_BASE+0x28)
+#define BCM2835_UART0_LCRH (BCM2835_UART0_BASE+0x2C)
+#define BCM2835_UART0_CR (BCM2835_UART0_BASE+0x30)
+#define BCM2835_UART0_IFLS (BCM2835_UART0_BASE+0x34)
+#define BCM2835_UART0_IMSC (BCM2835_UART0_BASE+0x38)
+#define BCM2835_UART0_RIS (BCM2835_UART0_BASE+0x3C)
+#define BCM2835_UART0_MIS (BCM2835_UART0_BASE+0x40)
+#define BCM2835_UART0_ICR (BCM2835_UART0_BASE+0x44)
+#define BCM2835_UART0_DMACR (BCM2835_UART0_BASE+0x48)
+#define BCM2835_UART0_ITCR (BCM2835_UART0_BASE+0x80)
+#define BCM2835_UART0_ITIP (BCM2835_UART0_BASE+0x84)
+#define BCM2835_UART0_ITOP (BCM2835_UART0_BASE+0x88)
+#define BCM2835_UART0_TDR (BCM2835_UART0_BASE+0x8C)
+
+#define BCM2835_UART0_MIS_RX 0x10
+#define BCM2835_UART0_MIS_TX 0x20
+#define BCM2835_UART0_IMSC_RX 0x10
+#define BCM2835_UART0_IMSC_TX 0x20
+#define BCM2835_UART0_FR_RXFE 0x10
+#define BCM2835_UART0_FR_TXFF 0x20
+#define BCM2835_UART0_ICR_RX 0x10
+#define BCM2835_UART0_ICR_TX 0x20
+
+
+/** @} */
+
+
+/**
+ * @name IRQ Registers
+ *
+ * @{
+ */
+
+#define BCM2835_BASE_INTC (0x2000B200)
+
+#define BCM2835_IRQ_BASIC (BCM2835_BASE_INTC + 0x00)
+#define BCM2835_IRQ_PENDING1 (BCM2835_BASE_INTC + 0x04)
+#define BCM2835_IRQ_PENDING2 (BCM2835_BASE_INTC + 0x08)
+#define BCM2835_IRQ_FIQ_CTRL (BCM2835_BASE_INTC + 0x0C)
+#define BCM2835_IRQ_ENABLE1 (BCM2835_BASE_INTC + 0x10)
+#define BCM2835_IRQ_ENABLE2 (BCM2835_BASE_INTC + 0x14)
+#define BCM2835_IRQ_ENABLE_BASIC (BCM2835_BASE_INTC + 0x18)
+#define BCM2835_IRQ_DISABLE1 (BCM2835_BASE_INTC + 0x1C)
+#define BCM2835_IRQ_DISABLE2 (BCM2835_BASE_INTC + 0x20)
+#define BCM2835_IRQ_DISABLE_BASIC (BCM2835_BASE_INTC + 0x24)
+
+/** @} */
+
+
+/**
+ * @name GPU Timer Registers
+ *
+ * @{
+ */
+
+/**
+ * NOTE: The GPU uses Compare registers 0 and 2 for
+ * it's own RTOS. 1 and 3 are available for use in
+ * RTEMS.
+ */
+#define BCM2835_GPU_TIMER_BASE (0x20003000)
+
+#define BCM2835_GPU_TIMER_CS (BCM2835_TIMER_BASE+0x00)
+#define BCM2835_GPU_TIMER_CLO (BCM2835_TIMER_BASE+0x04)
+#define BCM2835_GPU_TIMER_CHI (BCM2835_TIMER_BASE+0x08)
+#define BCM2835_GPU_TIMER_C0 (BCM2835_TIMER_BASE+0x0C)
+#define BCM2835_GPU_TIMER_C1 (BCM2835_TIMER_BASE+0x10)
+#define BCM2835_GPU_TIMER_C2 (BCM2835_TIMER_BASE+0x14)
+#define BCM2835_GPU_TIMER_C3 (BCM2835_TIMER_BASE+0x18)
+
+/** @} */
+
+
+/** @} */
+
+#endif /* LIBBSP_ARM_RASPBERRY_PI_RASPBERRY_PI_H */
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/irq/irq.c b/c/src/lib/libbsp/arm/raspberry_pi/irq/irq.c
new file mode 100755
index 0000000..ae0a81d
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/irq/irq.c
@@ -0,0 +1,124 @@
+/**
+ * @file
+ *
+ * @ingroup bsp_interrupt
+ *
+ * @brief Interrupt support.
+ */
+
+/*
+ * Copyright (c) 2009
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <rtems/score/armv4.h>
+
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <bsp/irq-generic.h>
+#include <bsp/raspberry_pi.h>
+#include <bsp/linker-symbols.h>
+#include <bsp/mmu.h>
+
+/*
+** This sets the main exception vectors
+*/
+void raspberry_pi_set_exception_handler(
+ Arm_symbolic_exception_name exception,
+ void (*handler)(void)
+ )
+{
+ if ((unsigned) exception < MAX_EXCEPTIONS)
+ {
+ uint32_t *table = (uint32_t *) bsp_section_vector_begin + MAX_EXCEPTIONS;
+ table [exception] = (uint32_t) handler;
+
+ }
+}
+
+/*
+** Determine the source of the interrupt and dispatch the correct handler.
+*/
+void bsp_interrupt_dispatch(void)
+{
+ rtems_vector_number vector = 255;
+
+ /* ARM timer */
+ if (BCM2835_REG(BCM2835_IRQ_BASIC) && 0x1)
+ {
+ vector = BCM2835_IRQ_ID_TIMER_0;
+
+ }
+ /* UART 0 */
+ else if ( BCM2835_REG(BCM2835_IRQ_BASIC) && BCM2835_BIT(19))
+ {
+ vector = BCM2835_IRQ_ID_UART;
+ }
+
+ if ( vector < 255 )
+ {
+ bsp_interrupt_handler_dispatch(vector);
+ }
+
+}
+
+rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
+{
+ rtems_interrupt_level level;
+
+ rtems_interrupt_disable(level);
+
+ /* ARM Timer */
+ if ( vector == BCM2835_IRQ_ID_TIMER_0 )
+ {
+ BCM2835_REG(BCM2835_IRQ_ENABLE_BASIC) = 0x1;
+ }
+ /* UART 0 */
+ else if ( vector == BCM2835_IRQ_ID_UART )
+ {
+ BCM2835_REG(BCM2835_IRQ_ENABLE2) = BCM2835_BIT(25);
+
+ }
+ rtems_interrupt_enable(level);
+
+ return RTEMS_SUCCESSFUL;
+}
+
+rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
+{
+ rtems_interrupt_level level;
+
+ rtems_interrupt_disable(level);
+
+ if ( vector == BCM2835_IRQ_ID_TIMER_0 )
+ {
+ BCM2835_REG(BCM2835_IRQ_DISABLE_BASIC) = 0x1;
+ }
+ else if ( vector == BCM2835_IRQ_ID_UART )
+ {
+ BCM2835_REG(BCM2835_IRQ_DISABLE2) = BCM2835_BIT(25);
+ }
+ rtems_interrupt_enable(level);
+
+ return RTEMS_SUCCESSFUL;
+}
+
+
+void bsp_interrupt_handler_default(rtems_vector_number vector)
+{
+ printk("spurious interrupt: %u\n", vector);
+}
+
+rtems_status_code bsp_interrupt_facility_initialize(void)
+{
+ raspberry_pi_set_exception_handler(ARM_EXCEPTION_IRQ, _ARMV4_Exception_interrupt);
+ return RTEMS_SUCCESSFUL;
+}
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/make/custom/raspberry_pi.cfg b/c/src/lib/libbsp/arm/raspberry_pi/make/custom/raspberry_pi.cfg
new file mode 100755
index 0000000..c33c148
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/make/custom/raspberry_pi.cfg
@@ -0,0 +1,24 @@
+#
+# Config file for RASPBERRY_PI
+#
+# $Id: $
+#
+
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU = arm
+
+CPU_CFLAGS = -mcpu=arm1176jzf-s \
+ -fomit-frame-pointer -mfpu=vfp -mfloat-abi=soft \
+ -mabi=apcs-gnu -ffreestanding
+
+CFLAGS_OPTIMIZE_V = -O2 -g
+
+# This defines the operations performed on the linked executable.
+# is currently required.
+define bsp-post-link
+ $(OBJCOPY) -O binary --strip-all \
+ $(basename $@).exe $(basename $@)$(DOWNEXT)
+ $(SIZE) $(basename $@).exe
+endef
+
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/misc/timer.c b/c/src/lib/libbsp/arm/raspberry_pi/misc/timer.c
new file mode 100755
index 0000000..522858a
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/misc/timer.c
@@ -0,0 +1,52 @@
+/**
+ * @file
+ *
+ * @ingroup raspberry_pi
+ *
+ * @brief Benchmark timer support.
+ */
+
+/*
+ * Copyright (c) 2008, 2009
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <rtems/timerdrv.h>
+#include <bsp/raspberry_pi.h>
+
+static bool benchmark_timer_find_average_overhead = false;
+
+static uint64_t benchmark_timer_base;
+
+void benchmark_timer_initialize(void)
+{
+ benchmark_timer_base = BCM2835_REG(BCM2835_GPU_TIMER_CLO);
+}
+
+uint32_t benchmark_timer_read(void)
+{
+ uint32_t delta = BCM2835_REG(BCM2835_GPU_TIMER_CLO) - benchmark_timer_base;
+
+ if (benchmark_timer_find_average_overhead)
+ {
+ return delta;
+ }
+ else
+ {
+ return BCM2835_REG(BCM2835_GPU_TIMER_CLO);
+ }
+}
+
+void benchmark_timer_disable_subtracting_average_overhead(bool find_average_overhead)
+{
+ benchmark_timer_find_average_overhead = find_average_overhead;
+}
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/preinstall.am b/c/src/lib/libbsp/arm/raspberry_pi/preinstall.am
new file mode 100755
index 0000000..2c6d75f
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/preinstall.am
@@ -0,0 +1,133 @@
+## Automatically generated by ampolish3 - Do not edit
+
+if AMPOLISH3
+$(srcdir)/preinstall.am: Makefile.am
+ $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
+endif
+
+PREINSTALL_DIRS =
+DISTCLEANFILES += $(PREINSTALL_DIRS)
+
+all-local: $(TMPINSTALL_FILES)
+
+TMPINSTALL_FILES =
+CLEANFILES = $(TMPINSTALL_FILES)
+
+all-am: $(PREINSTALL_FILES)
+
+PREINSTALL_FILES =
+CLEANFILES += $(PREINSTALL_FILES)
+
+$(PROJECT_LIB)/$(dirstamp):
+ @$(MKDIR_P) $(PROJECT_LIB)
+ @: > $(PROJECT_LIB)/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
+
+$(PROJECT_INCLUDE)/$(dirstamp):
+ @$(MKDIR_P) $(PROJECT_INCLUDE)
+ @: > $(PROJECT_INCLUDE)/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
+
+$(PROJECT_INCLUDE)/bsp/$(dirstamp):
+ @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
+ @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+
+$(PROJECT_INCLUDE)/libcpu/$(dirstamp):
+ @$(MKDIR_P) $(PROJECT_INCLUDE)/libcpu
+ @: > $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
+
+$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
+PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
+
+$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
+
+$(PROJECT_INCLUDE)/tm27.h: ../../shared/include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
+
+$(PROJECT_INCLUDE)/coverhd.h: ../../shared/include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
+
+$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
+
+$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h
+
+$(PROJECT_INCLUDE)/bsp/utility.h: ../../shared/include/utility.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/utility.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/utility.h
+
+$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
+
+$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h
+
+$(PROJECT_INCLUDE)/bsp/stackalloc.h: ../../shared/include/stackalloc.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/stackalloc.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/stackalloc.h
+
+$(PROJECT_INCLUDE)/bsp/uart-output-char.h: ../../shared/include/uart-output-char.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/uart-output-char.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/uart-output-char.h
+
+$(PROJECT_INCLUDE)/bsp/tod.h: ../../shared/tod.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/tod.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/tod.h
+
+$(PROJECT_INCLUDE)/bsp/linker-symbols.h: ../shared/include/linker-symbols.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/linker-symbols.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/linker-symbols.h
+
+$(PROJECT_INCLUDE)/bsp/start.h: ../shared/include/start.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/start.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/start.h
+
+$(PROJECT_INCLUDE)/bsp/lpc-timer.h: ../shared/lpc/include/lpc-timer.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-timer.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-timer.h
+
+$(PROJECT_INCLUDE)/bsp/lpc-dma.h: ../shared/lpc/include/lpc-dma.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc-dma.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc-dma.h
+
+$(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
+
+$(PROJECT_INCLUDE)/bsp/mmu.h: include/mmu.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/mmu.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/mmu.h
+
+$(PROJECT_INCLUDE)/bsp/raspberry_pi.h: include/raspberry_pi.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/raspberry_pi.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/raspberry_pi.h
+
+
+$(PROJECT_INCLUDE)/libcpu/arm-cp15.h: ../../../libcpu/arm/shared/include/arm-cp15.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/arm-cp15.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/arm-cp15.h
+
+$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
+TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
+
+$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
+TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds
+
+$(PROJECT_LIB)/linkcmds.base: ../shared/startup/linkcmds.base $(PROJECT_LIB)/$(dirstamp)
+ $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.base
+TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds.base
+
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/startup/bspreset.c b/c/src/lib/libbsp/arm/raspberry_pi/startup/bspreset.c
new file mode 100755
index 0000000..c3583f0
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/startup/bspreset.c
@@ -0,0 +1,31 @@
+/**
+ * @file
+ *
+ * @ingroup raspberry_pi
+ *
+ * @brief Reset code.
+ */
+
+/*
+ * Copyright (c) 2009
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <rtems.h>
+
+#include <bsp/bootcard.h>
+
+void bsp_reset( void)
+{
+ while (true) {
+ /* Do nothing */
+ }
+}
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/startup/bspstart.c b/c/src/lib/libbsp/arm/raspberry_pi/startup/bspstart.c
new file mode 100755
index 0000000..8075f75
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/startup/bspstart.c
@@ -0,0 +1,33 @@
+/**
+ * @file
+ *
+ * @ingroup raspberry_pi
+ *
+ * @brief Startup code.
+ */
+
+/*
+ * Copyright (c) 2009, 2010
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/bootcard.h>
+#include <bsp/irq-generic.h>
+#include <bsp/irq.h>
+#include <bsp/linker-symbols.h>
+#include <bsp/stackalloc.h>
+#include <bsp/raspberry_pi.h>
+
+void bsp_start(void)
+{
+ bsp_interrupt_initialize();
+}
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/startup/bspstarthooks.c b/c/src/lib/libbsp/arm/raspberry_pi/startup/bspstarthooks.c
new file mode 100755
index 0000000..9373baf
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/startup/bspstarthooks.c
@@ -0,0 +1,112 @@
+/**
+ * @file
+ *
+ * @ingroup raspberry_pi
+ *
+ * @brief Startup code.
+ */
+
+/*
+ * Copyright (c) 2009
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * <rtems at embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <stdbool.h>
+
+#include <bspopts.h>
+#include <bsp/start.h>
+#include <bsp/raspberry_pi.h>
+#include <bsp/mmu.h>
+#include <bsp/linker-symbols.h>
+#include <bsp/uart-output-char.h>
+
+static void BSP_START_TEXT_SECTION clear_bss(void)
+{
+ const int *end = (const int *) bsp_section_bss_end;
+ int *out = (int *) bsp_section_bss_begin;
+
+ /* Clear BSS */
+ while (out != end) {
+ *out = 0;
+ ++out;
+ }
+}
+
+static void BSP_START_TEXT_SECTION raspberry_pi_cache_setup(void)
+{
+ uint32_t ctrl = 0;
+
+ /* Disable MMU and cache, basic settings */
+ ctrl = arm_cp15_get_control();
+ ctrl &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_R | ARM_CP15_CTRL_C
+ | ARM_CP15_CTRL_V | ARM_CP15_CTRL_M);
+ ctrl |= ARM_CP15_CTRL_S | ARM_CP15_CTRL_A;
+ arm_cp15_set_control(ctrl);
+
+ arm_cp15_cache_invalidate();
+ arm_cp15_tlb_invalidate();
+
+}
+
+
+void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
+{
+ raspberry_pi_cache_setup();
+}
+
+
+void BSP_START_TEXT_SECTION bsp_start_hook_1(void)
+{
+
+ /* Copy .text section */
+ arm_cp15_instruction_cache_invalidate();
+ bsp_start_memcpy(
+ (int *) bsp_section_text_begin,
+ (const int *) bsp_section_text_load_begin,
+ (size_t) bsp_section_text_size
+ );
+
+ /* Copy .rodata section */
+ arm_cp15_instruction_cache_invalidate();
+ bsp_start_memcpy(
+ (int *) bsp_section_rodata_begin,
+ (const int *) bsp_section_rodata_load_begin,
+ (size_t) bsp_section_rodata_size
+ );
+
+ /* Copy .data section */
+ arm_cp15_instruction_cache_invalidate();
+ bsp_start_memcpy(
+ (int *) bsp_section_data_begin,
+ (const int *) bsp_section_data_load_begin,
+ (size_t) bsp_section_data_size
+ );
+
+ /* Copy .fast_text section */
+ arm_cp15_instruction_cache_invalidate();
+ bsp_start_memcpy(
+ (int *) bsp_section_fast_text_begin,
+ (const int *) bsp_section_fast_text_load_begin,
+ (size_t) bsp_section_fast_text_size
+ );
+
+ /* Copy .fast_data section */
+ arm_cp15_instruction_cache_invalidate();
+ bsp_start_memcpy(
+ (int *) bsp_section_fast_data_begin,
+ (const int *) bsp_section_fast_data_load_begin,
+ (size_t) bsp_section_fast_data_size
+ );
+
+ /* Clear .bss section */
+ clear_bss();
+
+}
diff --git a/c/src/lib/libbsp/arm/raspberry_pi/startup/linkcmds b/c/src/lib/libbsp/arm/raspberry_pi/startup/linkcmds
new file mode 100755
index 0000000..b9e6f02
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberry_pi/startup/linkcmds
@@ -0,0 +1,62 @@
+/**
+ * @file
+ *
+ * @ingroup raspberry_pi
+ *
+ * @brief Memory map.
+ */
+
+/**
+ * @defgroup raspberry_pi Memory Map
+ *
+ * @ingroup bsp_linker
+ *
+ * @brief Raspberry Pi memory map.
+ *
+ * <table>
+ * <tr><th>Region Name</th><th>Region Begin</th><th>Region Size</th></tr>
+ * <tr><td>VECTOR_RAM</td><td>0x08000000</td><td>8k</td></tr>
+ * <tr><td>RAM</td><td>0x80008000</td><td>128M</td></tr>
+ * </table>
+ *
+ * <table>
+ * <tr><th>Section Name</th><th>Section Runtime Region</th><th>Section Load Region</th></tr>
+ * <tr><td>.start</td><td>RAM</td><td></td></tr>
+ * <tr><td>.vector</td><td>VECTOR_RAM</td><td></td></tr>
+ * <tr><td>.text</td><td>RAM</td><td>RAM_EXT</td></tr>
+ * <tr><td>.rodata</td><td>RAM</td><td>RAM_EXT</td></tr>
+ * <tr><td>.data</td><td>RAM</td><td>RAM_EXT</td></tr>
+ * <tr><td>.fast</td><td>RAM</td><td>RAM_EXT</td></tr>
+ * <tr><td>.bss</td><td>RAM</td><td></td></tr>
+ * <tr><td>.work</td><td>RAM</td><td></td></tr>
+ * <tr><td>.stack</td><td>RAM</td><td></td></tr>
+ * </table>
+ */
+
+MEMORY {
+ VECTOR_RAM (AIW) : ORIGIN = 0x0 , LENGTH = 0x8000
+ RAM (AIW) : ORIGIN = 0x00008000, LENGTH = 128M - 0x8000
+}
+
+REGION_ALIAS ("REGION_START", RAM);
+REGION_ALIAS ("REGION_VECTOR", VECTOR_RAM);
+REGION_ALIAS ("REGION_TEXT", RAM);
+REGION_ALIAS ("REGION_TEXT_LOAD", RAM);
+REGION_ALIAS ("REGION_RODATA", RAM);
+REGION_ALIAS ("REGION_RODATA_LOAD", RAM);
+REGION_ALIAS ("REGION_DATA", RAM);
+REGION_ALIAS ("REGION_DATA_LOAD", RAM);
+REGION_ALIAS ("REGION_FAST_TEXT", RAM);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
+REGION_ALIAS ("REGION_FAST_DATA", RAM);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
+REGION_ALIAS ("REGION_BSS", RAM);
+REGION_ALIAS ("REGION_WORK", RAM);
+REGION_ALIAS ("REGION_STACK", RAM);
+
+bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 4096;
+bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024;
+
+bsp_section_robarrier_align = DEFINED (bsp_section_robarrier_align) ? bsp_section_robarrier_align : 1M;
+
+INCLUDE linkcmds.armv4
diff --git a/cpukit/score/cpu/arm/rtems/score/arm.h b/cpukit/score/cpu/arm/rtems/score/arm.h
index 8f8c837..8471bb4 100644
--- a/cpukit/score/cpu/arm/rtems/score/arm.h
+++ b/cpukit/score/cpu/arm/rtems/score/arm.h
@@ -69,6 +69,10 @@ extern "C" {
# define CPU_MODEL_NAME "ARMv6J"
# define ARM_MULTILIB_ARCH_V4
+#elif defined(__ARM_ARCH_6ZK__)
+# define CPU_MODEL_NAME "ARMv6ZK"
+# define ARM_MULTILIB_ARCH_V4
+
#elif defined(__ARM_ARCH_6M__)
# define CPU_MODEL_NAME "ARMv6M"
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