Current RTEMS master build for CSB336 (MC9328MXL)

[Joel Sherrill]

On 7/24/2013 7:58 AM, Pavel Pisa wrote:
> Hello Sebastian Huber and others,
>
> I have started testing of RTEMS git (i.e. 4.11 pre) and I have found
> error during compile that CPU_ALIGNMENT definition is missing in
> the heap implementation.
I have this also on sparc/sis.  But I see the fix was committed.

Thanks.

> Next change fixes the problem
>
>
> diff --git a/cpukit/score/include/rtems/score/heapimpl.h b/cpukit/score/include/rtems/score/heapimpl.h
> index 27c3a23..6855244 100644
> --- a/cpukit/score/include/rtems/score/heapimpl.h
> +++ b/cpukit/score/include/rtems/score/heapimpl.h
> @@ -19,6 +19,7 @@
>   #define _RTEMS_SCORE_HEAPIMPL_H
>
>   #include <rtems/score/heap.h>
> +#include <rtems/score/cpu.h>
>
>   #ifdef __cplusplus
>
>
>
> Tested on master 218286bc055e9d9bcbefd3dfa2b38f92a95b15a6 7/23/13 5:17 PM
>
> I have found some other problems with CSB336 on real hardware.
> I have resolved already some and investigating others.
>
> The good new is that I have hacked version (without MMU
> mapped memory to the the address 0 which uses jumps from
> Flash for the exception processing) which is able to run
> some minimal applications.
>
> I expect, I get to more testing (even the graphic on CSB336)
> when I return from vacations (planned from July 26 till August 4 or 8).
>
> The one fix which is the must for MC9328MXL is the correction
> of bsp_interrupt_dispatch() function.
>
> diff --git a/c/src/lib/libcpu/arm/mc9328mxl/irq/irq.c b/c/src/lib/libcpu/arm/mc9328mxl/irq/irq.c
> index 447dedf..d3bde4c 100644
> --- a/c/src/lib/libcpu/arm/mc9328mxl/irq/irq.c
> +++ b/c/src/lib/libcpu/arm/mc9328mxl/irq/irq.c
> @@ -20,18 +20,29 @@
>
>   void bsp_interrupt_dispatch(void)
>   {
> -  rtems_vector_number vector = *((uint32_t *) 0x00223040) >> 16;
> +
> +  rtems_vector_number vector = MC9328MXL_AITC_NIVECSR >> 16;
>
>     bsp_interrupt_handler_dispatch(vector);
>   }
>
>
> The original is missing void and (*x >> 16) is optimized to ldh rX,[rY].
> But it is not allowed/supported to access bus/range used by AITC
> by other than 32 bit wide accesses and access results in the data abort.
> The corrected version works and is even more readable.
>
> I think that it worth to provide non-stub implementation
> of bsp_interrupt_vector_enable/disable as well.
>
>   rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
>   {
> +  if (vector >= MC9328MXL_NUM_INTS)
> +     return RTEMS_INVALID_ID;
> +
> +  MC9328MXL_AITC_INTENNUM = vector;
> +
>     return RTEMS_SUCCESSFUL;
>   }
>
>   rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
>   {
> +  if (vector >= MC9328MXL_NUM_INTS)
> +     return RTEMS_INVALID_ID;
> +
> +  MC9328MXL_AITC_INTDISNUM = vector;
> +
>     return RTEMS_SUCCESSFUL;
>   }
>
>
> Or is there some reason to have only local version of this functionality
> in rtems_irq_connect_data? I.e. for
>
> static void clock_isr_on(const rtems_irq_connect_data *unused)
> {
>    MC9328MXL_TMR1_TCTL |= MC9328MXL_TMR_TCTL_IRQEN;
>    MC9328MXL_AITC_INTENNUM = MC9328MXL_INT_TIMER1;
> }
>
> I expect to prepare separate bsp_interrupt_dispatch fix patch
> and extension of the bsp_interrupt_vector_enable/disable
> as an other GIT formatted patch and send these to the
> devel list. If there is confirmation today, I can do it before my
> leave else after return. Is that OK?
> I do not expect to do separate patch for score/heapimpl.h.
> Please, commit that fix directly.
>
> I will report other findings when I have more information
> what is the problem with page/rage 0 overlay. It worked
> well in 4.9 so it is something strange there.
>
> Best wishes,
>
>                  Pavel
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> rtems-devel mailing list
> rtems-devel at rtems.org
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-- 
Joel Sherrill, Ph.D.             Director of Research & Development
joel.sherrill at OARcorp.com        On-Line Applications Research
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