[GSoC] psim BSP memory layout

[Sebastian Huber]

On 29/06/13 22:58, Hesham Moustafa wrote:
> I want to understand how memory layout works at psim BSP. I studied linkcmd
> for psim and found that there are 16MB for RAM (starting at 0x00000000) and
> another 16MB for psim-registers (starting at 0x0C00000). all sections goes
> to psim-registers memory with noload (why?) directive. What exactly
> psim-registers area represents ? and what goes into RAM area ? Also where
> PCI I/O map starts and end and how PCI map relates to BAT ?

I removed the PSIM noload stuff last week since it resulted in some link 
problems in the GCC test suite.  It was noload since the simulator 
provided the content for this address space.

You have to look at the BSP sources, the PSIM documentation and the 
device file to figure out how the memory map looks like if nobody knows 
this off-hand.

http://git.rtems.org/rtems-testing/tree/sim-scripts/psim.in

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Sebastian Huber, embedded brains GmbH

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