[PATCH 1/3] Add a new necessary definition needed for raspberrypi MMU support

[Joel Sherrill]

I am not an expert on arm variants but if all arm configurations bud with it, then OK. If it breaks something in the future.. We will deal with it then.

Gedare Bloom <gedare at rtems.org> wrote:


OK to commit? The only issue I see is whether we strictly need the FSR
defines, but they should be OK?

On Mon, Sep 16, 2013 at 12:17 PM, Hesham AL-Matary
<heshamelmatary at gmail.com> wrote:
> The new ARM_CP15_CTRL_XP is necessary to share ARMv6 and ARMv7
> page-table formats and definitions.
> It enables the extended page tables (introduced in ARMv6)
> to be configured for the hardware page translation mechanism. This way
> we can share ARMv6 and ARMv7 page tables entry formats.
>
> Other Fault Status Register Definitions can be useful for debugging or
> excpetion handlers.
>
> ---
>  c/src/lib/libcpu/arm/shared/include/arm-cp15.h | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
>
> diff --git a/c/src/lib/libcpu/arm/shared/include/arm-cp15.h b/c/src/lib/libcpu/arm/shared/include/arm-cp15.h
> index 0117a5e..17cab18 100644
> --- a/c/src/lib/libcpu/arm/shared/include/arm-cp15.h
> +++ b/c/src/lib/libcpu/arm/shared/include/arm-cp15.h
> @@ -7,6 +7,7 @@
>   */
>
>  /*
> + * Copyright (c) 2013 Hesham AL-Matary
>   * Copyright (c) 2009-2013 embedded brains GmbH.  All rights reserved.
>   *
>   *  embedded brains GmbH
> @@ -139,6 +140,7 @@ extern "C" {
>  #define ARM_CP15_CTRL_NMFI (1U << 27)
>  #define ARM_CP15_CTRL_EE (1U << 25)
>  #define ARM_CP15_CTRL_VE (1U << 24)
> +#define ARM_CP15_CTRL_XP (1U << 23)
>  #define ARM_CP15_CTRL_U (1U << 22)
>  #define ARM_CP15_CTRL_FI (1U << 21)
>  #define ARM_CP15_CTRL_UWXN (1U << 20)
> @@ -173,6 +175,25 @@ extern "C" {
>
>  /** @} */
>
> +/**
> + * @name Fault Status Register Defines
> + *
> + * @{
> + */
> +
> +#define ARM_CP15_FAULT_STATUS_MASK 0x040F
> +
> +#define ARM_CP15_FSR_ALIGNMENT_FAULT   0x00000001
> +#define ARM_CP15_FSR_BACKGROUND_FAULT  0x0000
> +#define ARM_CP15_FSR_ACCESS_PERMISSION_FAULT 0x000D
> +#define ARM_CP15_FSR_PRECISE_EXTERNAL_ABORT_FAULT 0x0008
> +#define ARM_CP15_FSR_IMPRECISE_EXTERNAL_ABORT_FAULT 0x0406
> +#define ARM_CP15_FSR_PRECISE_PARITY_ERROR_EXCEPTION 0x0006
> +#define ARM_CP15_FSR_IMPRECISE_PARITY_ERROR_EXCEPTION 0x0408
> +#define ARM_CP15_FSR_DEBUG_EVENT 0x0002
> +
> +/** @} */
> +
>  static inline uint32_t arm_cp15_get_id_code(void)
>  {
>    ARM_SWITCH_REGISTERS;
> --
> 1.8.3.1
>
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