[PATCH 1/5] sptests/spcache01: Make inline assembly conditional to account for OpenRISC l.nop instruction.

Joel Sherrill joel.sherrill at oarcorp.com
Mon Aug 25 16:15:56 UTC 2014


I pushed all of this set and will be testing soon.

Can you post your simulator configuration file?

--joel

On 8/22/2014 3:20 PM, Hesham ALMatary wrote:
> ---
>  testsuites/sptests/spcache01/init.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/testsuites/sptests/spcache01/init.c b/testsuites/sptests/spcache01/init.c
> index 2c9d184..ad9b54f 100644
> --- a/testsuites/sptests/spcache01/init.c
> +++ b/testsuites/sptests/spcache01/init.c
> @@ -27,7 +27,11 @@
>  
>  const char rtems_test_name[] = "SPCACHE 1";
>  
> -#define I() __asm__ volatile ("nop")
> +#ifdef __or1k__
> +  #define I() __asm__ volatile ("l.nop")
> +#else
> +  #define I() __asm__ volatile ("nop")
> +#endif
>  
>  #define I8() I(); I(); I(); I(); I(); I(); I(); I()
>  

-- 
Joel Sherrill, Ph.D.             Director of Research & Development
joel.sherrill at OARcorp.com        On-Line Applications Research
Ask me about RTEMS: a free RTOS  Huntsville AL 35805
Support Available                (256) 722-9985




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