[PATCH 1/5] sptests/spcache01: Make inline assembly conditional to account for OpenRISC l.nop instruction.

[Joel Sherrill]

On 8/26/2014 9:38 AM, Hesham Moustafa wrote:
> On Tue, Aug 26, 2014 at 4:09 PM, Joel Sherrill
> <joel.sherrill at oarcorp.com> wrote:
>> On 8/26/2014 8:53 AM, Hesham Moustafa wrote:
>>> Hi,
>>>
>>> On Mon, Aug 25, 2014 at 6:15 PM, Joel Sherrill
>>> <joel.sherrill at oarcorp.com> wrote:
>>>> I pushed all of this set and will be testing soon.
>>>>
>>> Great, Thanks!
>> No problem. We know this is a work in progress and it is better to
>> keep the delta small as progress is made.
>>>> Can you post your simulator configuration file?
>>>>
>>> Here it's https://github.com/heshamelmatary/or1k-rtems/blob/master/sim.cfg
>>> Should I include it part of the or1ksim BSP directory (or anywhere else)?
>> In the BSP Readme would be great.  We really need the simulator run
>> scripts to
>> support this simulator. That also captures the information.
>>
> The whole configuration file (sim.cfg) content into README?
Is it too big? If so, just add a file and reference it from the readme.
>> + rtems-testing/sim-scripts
> I can start with this one, would it make sense to make the or1ksim
> script creates a sim.cfg file (with parameterized configurations)?
Look at psim or any of the skyeye based simulators. They have to create
a device
description file.
>> + rtems-tools/tester
>>
>> I don't expect it to be hard to add to both once the or1ksim is built by
>> the RSB.
>>
>> FWIW that's what I am waiting for to help debug/test if that gives you
>> incentive. :)
>>
>> --joel
>>>> --joel
>>>>
>>>> On 8/22/2014 3:20 PM, Hesham ALMatary wrote:
>>>>> ---
>>>>>  testsuites/sptests/spcache01/init.c | 6 +++++-
>>>>>  1 file changed, 5 insertions(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/testsuites/sptests/spcache01/init.c b/testsuites/sptests/spcache01/init.c
>>>>> index 2c9d184..ad9b54f 100644
>>>>> --- a/testsuites/sptests/spcache01/init.c
>>>>> +++ b/testsuites/sptests/spcache01/init.c
>>>>> @@ -27,7 +27,11 @@
>>>>>
>>>>>  const char rtems_test_name[] = "SPCACHE 1";
>>>>>
>>>>> -#define I() __asm__ volatile ("nop")
>>>>> +#ifdef __or1k__
>>>>> +  #define I() __asm__ volatile ("l.nop")
>>>>> +#else
>>>>> +  #define I() __asm__ volatile ("nop")
>>>>> +#endif
>>>>>
>>>>>  #define I8() I(); I(); I(); I(); I(); I(); I(); I()
>>>>>
>>>> --
>>>> Joel Sherrill, Ph.D.             Director of Research & Development
>>>> joel.sherrill at OARcorp.com        On-Line Applications Research
>>>> Ask me about RTEMS: a free RTOS  Huntsville AL 35805
>>>> Support Available                (256) 722-9985
>>>>
>> --
>> Joel Sherrill, Ph.D.             Director of Research & Development
>> joel.sherrill at OARcorp.com        On-Line Applications Research
>> Ask me about RTEMS: a free RTOS  Huntsville AL 35805
>> Support Available                (256) 722-9985
>>

-- 
Joel Sherrill, Ph.D.             Director of Research & Development
joel.sherrill at OARcorp.com        On-Line Applications Research
Ask me about RTEMS: a free RTOS  Huntsville AL 35805
Support Available                (256) 722-9985